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參數(shù)資料
| 型號： | LM80CIMT-5 |
| 英文描述： | Single-Ended Data Acquisition System |
| 中文描述： | 單端數(shù)據(jù)采集系統(tǒng) |
| 文件頁數(shù)： | 3/29頁 |
| 文件大?。?/td> | 409K |
| 代理商： | LM80CIMT-5 |
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Pin Descriptions
(Continued)
Pin
Name(s)
Pin
Number
4-5
6
Number
of Pins
2
1
Type
Description
FAN1-FAN2
BTI
Digital Inputs
Digital Input
0 to V
+
fan tachometer inputs.
Board Temperature Interrupt driven by O.S. outputs of additional
temperature sensors such as LM75. Provides internal pull-up of
10 k
.
An active high input from an external circuit which latches a Chassis
Intrusion event. This line can go high without any clamping action
regardless of the powered state of the LM80. The LM80 provides an
internal open drain on this line, controlled by Bit 5 of the
Configuration Register, to provide a minimum 10 ms reset of this
line.
Internally connected to all of the digital circuitry.
+3.3V or +5V V
+
power. Bypass with the parallel combination of
10 μF (electrolytic or tantalum) and 0.1 μF (ceramic) bypass
capacitors.
Non-Maskable Interrupt (open source)/Interrupt Request (open
drain). The mode is selected with Bit 5 of the Configuration Register
and the output is enabled when Bit 1 of the Configuration Register
is set to 1. The default state is disabled.
An active low open drain output intended to drive an external
P-channel power MOSFET for software power control.
An active-low input that enables NAND Tree board-level connectivity
testing. Refer to Section 10.0 on NAND Tree testing. Whenever
NAND Tree connectivity is enabled the LM80 is also reset to its
power on state.
Master Reset, 5 mA driver (open drain), active low output with a
10 ms minimum pulse width. Available when enabled via Bit 4 in
Configuration Register and Bit 7 of the Fan Divisor/RST_OUT/OS
Register. Bit 6 of the Fan Divisor/RST_OUT/OS Register enables
this output as an active low Overtemperature Shutdown (OS).
Internally connected to all analog circuitry. The ground reference for
all analog inputs. This pin needs to be taken to a low noise analog
ground plane for optimum performance.
0V to 2.56V full scale range Analog Inputs.
The lowest order bit of the Serial Bus Address. This pin functions as
an output when doing a NAND Tree test.
The two highest order bits of the Serial Bus Address.
CI (Chassis
Intrusion)
7
1
Digital I/O
GND
V
+
(+2.8V to
+5.75V)
8
9
1
1
GROUND
POWER
INT
10
1
Digital Output
GPO (Power
Switch Bypass)
NTEST_IN/
RESET_IN
11
1
Digital Output
12
1
Digital Input
RST_OUT/OS
13
1
Digital Output
GNDA
14
1
GROUND
IN6-IN0
A0/NTEST_OUT
15-21
22
7
1
Analog Inputs
Digital I/O
A1-A2
TOTAL PINS
23-24
2
24
Digital Inputs
L
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相關PDF資料 |
PDF描述 |
|---|---|
| LM80CIMTX-3 | Single-Ended Data Acquisition System |
| LM80CIMTX-5 | Single-Ended Data Acquisition System |
| LM8162 | |
| LM8164 | |
| LM8165 | |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LM80CIMT-5/NOPB | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| LM80CIMT-5/NOPB | 制造商:Texas Instruments 功能描述:Temperature Sensor IC |
| LM80CIMT-51 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor |
| LM80CIMTX3 | 制造商:Texas Instruments 功能描述: |
| LM80CIMTX-3 | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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