參數(shù)資料
型號: LM4931
廠商: National Semiconductor Corporation
英文描述: Audio Subsystem with Mono High Efficiency Loudspeaker and Stereo Headphone Amplifiers
中文描述: 與單聲道音頻子系統(tǒng)高效揚聲器和立體聲耳機放大器
文件頁數(shù): 13/47頁
文件大?。?/td> 1640K
代理商: LM4931
System Control
(Continued)
When the part is configured as an I
2
C device then the LM4931 will respond to one of two addresses, according to theADDR input.
If ADDR is low then the address portion of the I
2
C transaction should be set to write to 0010000. When ADDR is high then the
address input should be set to write to 1110000. The LM4931 uses the following 11 registers to store configuration information:
SYSTEM CONTROL TABLE
Address
00000000
00000001
00000010
00000011
00000100
00000101
00000110
00000111
00001000
00001001
00001010
Register Name
BASIC_CONFIG
VOICE_CONFIG
MIC_GAIN
HP_GAIN
LS_GAIN
PLL_M
PLL_N
PLL_P
CLK_MUX
INTERFACES
PMC_CONFIG
Description
Controls the output mode configuration
Controls the settings for the voice codec
Controls the gain and muting of the microphone pre-amplifier
Controls the gain and muting of the headphone amplifier
Controls the gain and muting of the loudspeaker amplifier
Sets the PLL input divider
Sets the PLL feedback divider
Sets the PLL output divider
Configures the clock divider
Controls the format of the PCM, I
2
S and GPIO interfaces
Controls the power management functions
L
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