Non-MTE Specific Characteristics
(Continued)
Application Information
PIN OUT COMPATIBILITY WITH THE LM4863
The LM4873 pin out was designed to simplify replacing the
LM4863: except for the four bottom pins, which the imple-
ment the LM4873’s extra functionality, the LM4873MT/MTE
and LM4863MT/MTE pin outs match.(Note 22)
Note 22:
If the LM4873 replaces an LM4863 and the input mux circuitry is
not being used, the LM4873 Mux Control pin must be tied to V
DD
or GND.
INPUT MUX
The has two inputs per channel. The Mux Control pin con-
trols which input is active. As shown in the
Truth Table for
Logic Inputs
, if the Mux Control is held low, input 1 is active.
If the Mux Control is held high, input 2 is active.
Figure 2shows an example usage of the Mux Control circuit.
Mux input 1 is connected to a feedback network that in-
creases gain at low frequencies (bass boost). Mux input 2 is
connected to a simple gain circuit. The example circuit has
mux input 1 used to equalize the internal speaker and mux
input 2 used for line-out or headphone driving. In this case,
the Mux Control and HP In pins would be tied together, so
that when the headphone was plugged in, the feedback net-
work would automatically be changed. If the HP In and Mux
Control pins are not connected, the example circuit be used
for user-selectable bass-boost, so that independent of the
HP In state, the user could select bass-boost.
Since the Mux Control switches between the two inverting in-
puts of the amplifier, thereby changing the input signal
source or the feedback network, an audible click may be
generated during the transition from one mux input to the
other. For example, in the above example circuit, if the two
gains are markedly different, then, when a transition is made
between mux states, a click may be heard as the feedback
network, and therefore the gain, is suddenly changed.
EXPOSED-DAP MOUNTING CONSIDERATIONS
The exposed-DAP package of the LM4873MTE requires
special attention to thermal design. If thermal design issues
are not properly addressed, an LM4873MTE driving 4
will
go into thermal shutdown.
The exposed-DAP on the bottom of the LM4873MTE should
be soldered down to a copper pad on the circuit board. Heat
is conducted away from the exposed-DAP by a copper
plane. If the copper plane is not on the top surface of the cir-
cuit board, 8 to 10 vias of 0.013 inches or smaller in diameter
should be used to thermally couple the exposed-DAP to the
plane. For good thermal conduction, the vias must be
plated-through and solder-filled.
The copper plane used to conduct heat away from the
exposed-DAP should be as large as pratical. If the plane is
on the same side of the circuit board as the exposed-DAP,
2.5in
2
is the minimum for 5V operation into 4
. If the heat
sink plane is buried or not on the same side as the exposed-
DAP, 5in
2
is the minimum for 5V operation into 4
. If the am-
bient temperature is higher than 25C, a larger copper plane
or
forced-air
cooling
will
LM4873MTE junction temperature below the thermal shut-
down temperature (150C). See the power derating curve for
the LM4873MTE for derating information.
The LM4873MTE requires forced-air cooling when operating
into 3
. With the part attached to 2.5in
2
of exposed copper,
with a 3
load, and with an ambient temperature of 25C,
450 linear-feet per minute kept the part out of thermal shut-
down. In higher ambient temperatures, higher airflow rates
and/or larger copper areas will be required to keep the part
out of thermal shutdown.
See
DEMOBOARD CIRCUIT LAYOUT
for an example of an
exposed-DAP TSSOP circuit board layout.
be
required
to
keep
the
3
& 4
LAYOUT CONSIDERATIONS
With low impedance loads, the output power at the loads is
heavily dependent on trace resistance from the output pins
of the LM4873. Traces from the output of the LM4873MTE to
the load or load connectors should be as wide as practical.
Any resistance in the output traces will reduce the power de-
Power Supply
Rejection Ratio
DS100993-21
Open Loop
Frequency Response
DS100993-22
Supply Current vs
Supply Voltage
DS100993-23
DS100993-70
FIGURE 2. Input Mux Example
L
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