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Application Information
(Continued)
POWER GOOD SIGNAL
The Power Good signal is an OR-gated flag which takes into
account both output overvoltage and undervoltage condi-
tions. If the feedback pin (FB) voltage is 18% above its
nominal value or falls 28% below that value the Power Good
flag goes low. The Power Good flag can be used to signal
other circuits that the output voltage has fallen out of regu-
lation, however the switching of the LM2744 continues re-
gardless of the state of the Power Good signal. The Power
Good flag will return to logic high whenever the feedback pin
voltage is between 72% and 118% of V
REF
.
UVLO
The 2.76V turn-on threshold on V
has a built in hysteresis
of about 300mV. If V
drops below 2.42V, the chip enters
UVLO mode. UVLO consists of turning off the top and bot-
tom MOSFETS and remaining in that condition until V
rises above 2.76V. As with shutdown, the soft-start capacitor
is discharged through an internal MOSFET, ensuring that the
next start-up will be controlled by the soft-start circuitry.
CURRENT LIMIT
Current limit is realized by sensing the voltage across the
low-side MOSFET while it is on. The R
DSON
of the MOSFET
is a known value; hence the current through the MOSFET
can be determined as:
V
DS
= I
OUT
* R
DSON
The current through the low-side MOSFET while it is on is
also the falling portion of the inductor current. The current
limit threshold is determined by an external resistor, R
CS
,
connected between the switching node and the I
SEN
pin. A
constant current of 40 μA is forced through R
, causing a
fixed voltage drop. This fixed voltage is compared against
V
and if the latter is higher, the current limit of the chip has
been reached. R
CS
can be found by using the following
equation:
R
CS
= R
DSON
x I
LIM
/ 40 μA
For example, a conservative 15A current limit in a 10A
design with a minimum R
of 10m
would require a
3.74k
resistor. Because current sensing is done across the
low-side MOSFET, no minimum high-side on-time is neces-
sary. The LM2744 enters current limit mode if the inductor
current exceeds the current limit threshold at the point where
the high-side MOSFET turns off and the low-side MOSFET
turns on. (The point of peak inductor current, see
Figure 10
).
Note that in normal operation mode the high-side MOSFET
always turns on at the beginning of a clock cycle. In current
limit mode, by contrast, the high-side MOSFET on-pulse is
skipped. This causes inductor current to fall. Unlike a normal
operation switching cycle, however, in a current limit mode
switching cycle the high-side MOSFET will turn on as soon
as inductor current has fallen to the current limit threshold.
The LM2744 will continue to skip high-side MOSFET pulses
until the inductor current peak is below the current limit
threshold, at which point the system resumes normal opera-
tion.
Unlike a high-side MOSFET current sensing scheme, which
limits the peaks of inductor current, low-side current sensing
is only allowed to limit the current during the converter
off-time, when inductor current is falling. Therefore in a typi-
cal current limit plot the valleys are normally well defined, but
the peaks are variable, according to the duty cycle. The
PWM error amplifier and comparator control the off-pulse of
the high-side MOSFET, even during current limit mode,
meaning that peak inductor current can exceed the current
limit threshold. Assuming that the output inductor does not
saturate, the maximum peak inductor current during current
limit mode can be calculated with the following equation:
where T
OSC
is the inverse of switching frequency F
SW
. The
200ns term represents the minimum off-time of the duty
cycle, which ensures enough time for correct operation of
the current sensing circuitry.
In order to minimize the time period in which peak inductor
current exceeds the current limit threshold, the IC also dis-
charges the soft-start capacitor through a fixed 90 μA sink.
The output of the LM2744 internal error amplifier is limited by
the voltage on the soft-start capacitor. Hence, discharging
the soft-start capacitor reduces the maximum duty cycle D of
the controller. During severe current limit this reduction in
duty cycle will reduce the output voltage if the current limit
conditions last for an extended time. Output inductor current
will be reduced in turn to a flat level equal to the current limit
threshold. The third benefit of the soft-start capacitor dis-
charge is a smooth, controlled ramp of output voltage when
the current limit condition is cleared.
SHUTDOWN
If the shutdown pin is pulled low, (below 0.8V) the LM2744
enters shutdown mode, and discharges the soft-start capaci-
tor through a MOSFET switch. The high and low-side MOS-
FETs are turned off. The LM2744 remains in this state as
long as V
SD
sees a logic low (see the Electrical Character-
istics table). To assure proper IC start-up the shutdown pin
20106088
FIGURE 10. Current Limit Threshold
L
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