Electrical Characteristics
(Continued)
Typicals and limits appearing in regular type apply for T
= 25C. Limits appearing in
boldface
type apply over the entire junc-
tion temperature range for operation, 0 to +125C. Unless otherwise specified under the Parameter or Conditions columns, V
IN
= 10V, and V
SD
= V
ON/OFF1
= V
ON/OFF2
= 5V. (Note 2), (Note 6) and (Note 7)
Symbol
Parameter
Conditions
I
COMP1
, I
COMP2
COMP Output Source Current
V
FB1
= V
FB2
= 1V, V
COMP1
=
V
COMP2
= 1V
I
COMP1
, I
COMP2
COMP Output Sink Current
V
FB1
= V
FB2
= 1.4V, V
COMP1
=
V
COMP2
= 0.2V
Voltage References and Linear Voltage Regulator
V
BG
Bandgap Voltage
V
REF
Reference Voltage
0.01 mA
≤
I
REF
≤
5 mA Source,
V
LIN
≤
6V
Typical
90
Limit
Units
μA
μA(min)
μA
μA(min)
40
60
40
1.238
2.5
V
V
2.45
2.55
V(min)
V(max)
0.01 mA
≤
I
REF
≤
5 mA Source,
V
LIN
≤
6V
40C
≤
T
J
≤
+125C
6V
≤
V
IN
≤
30V,
0 mA
≤
I
LIN
≤
25 mA
2.5
2.45
2.555
V(min)
V(max)
V
LIN
Output Voltage of the Linear
Voltage Regulator
5
V
4.6
5.4
V(min)
V(max)
V
V(min)
V(max)
V(min)
V(max)
V
V
UVLO
Undervoltage Lockout
Threshold
(Note 11)
4.0
3.6
4.4
3.6
4.42
(Note 11)
40C
≤
T
J
≤
+125C
V
OUT
taken at CSL1
4.0
LIN-to-V
OUT
Switch-Over
Threshold
4.8
Logic Inputs
V
IH
Minimum High Level Input
Voltage (SD, ON/OFF1,
ON/OFF2, and SYNC)
2.4
V(min)
40C
≤
T
J
≤
+125C
2.45
2.6
V(min)
V(min)
V
IH
Minimum High Level Input
Voltage (2NDFB/FPWM)
Maximum Low Level Input
Voltage (SD, ON/OFF1,
ON/OFF2, SYNC, and
2NDFB/FPWM)
Maximum Input Leakage
Current (SD, ON/OFF1,
ON/OFF2, and SYNC)
V
IL
0.8
V(max)
Logic Input Voltage 0 or 5V
±
0.1
μA
Note 1:
Unless otherwise specified, all voltages are with respect to the voltage at the GND and PGND pins.
Note 2:
Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device
is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical
Characteristics tables.
Note 3:
The Absolute Maximum power dissipation depends on the ambient temperature. The 883 mW rating results from substituting 150C, 70C, and 90.6C/W
for T
Jmax
, T
A
, and
θ
JA
respectively into the formula P
max
= (T
Jmax
- T
A
)/
θ
JA
, where P
max
is theAbsolute Maximum power dissipation, T
Jmax
is theAbsolute Maximum
junction temperature, T
A
is the ambient temperature, and
θ
JA
is the junction-to-ambient thermal resistance of the package. A
θ
JA
of 90.6C/W represents the
worst-case condition of no heat sinking of the 28-pin TSSOP. Heat sinking allows the safe dissipation of more power. TheAbsolute Maximum power dissipation must
be derated by 11.04 mW per C above 70C ambient. The LM2640 actively limits its junction temperature to about 150C.
Note 4:
For detailed information on soldering plastic small-outline packages, refer to the Packaging Databook available from National Semiconductor Corporation.
Note 5:
For testing purposes, ESD was applied using the human-body model, a 100 pF capacitor discharged through a 1.5 k
resistor.
Note 6:
A typical is the center of characterization data taken with T
A
= T
J
= 25C. Typicals are not guaranteed.
Note 7:
All limits are guaranteed. All electrical characteristics having room-temperature limits are tested during production with T
A
= 25C. All hot and cold limits are
guaranteed by correlating the electrical characteristics to process and temperature variations and applying statistical process control.
L
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