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參數(shù)資料
| 型號： | LM2640 |
| 文件頁數(shù)： | 15/18頁 |
| 文件大?。?/td> | 504K |
| 代理商： | LM2640 |
Application Information
(Continued)
The components shown will add poles and zeros to the loop
gain as given by the following equations:
C10 adds a pole whose frequency is given by:
f
p
(C10) = 1 / [2
π
X C10 (R11 + 160k) ]
C12 adds a pole whose frequency is given by:
f
p
(C12) = 1 / [2
π
X C12 (R11 || 160k) ]
R11 adds a zero whose frequency is given by:
f
z
(R11) = 1 / [2
π
X R11 (C10 + C12) ]
The output capacitor adds both a pole and a zero to the loop:
f
p
(C
OUT
) = 1 / [2
π
X R
L
X C
OUT
]
f
z
(ESR) = 1 / [2
π
X ESR X C
OUT
]
Where R
is the load resistance, and ESR is the equivalent
series resistance of the output capacitor(s).
The function of the compensation components will be ex-
plained in a qualitative discussion of a typical loop gain plot
for an LM2640 application, as illustrated in Figure 5
C10 and R11 form a pole and a zero. Changing the value of
C10 moves the frequency of both the pole and the zero.
Changing R11 moves the zero without significantly affecting
the pole.
The C10 pole is typically referred to as the dominant pole,
and its primary function is to roll off loop gain and reduce the
bandwidth.
The R11 zero is required to add some positive phase shift to
offset some of the negative phase shift from the two
low-frequency poles. Without this zero, these two poles
would cause 180 of phase shift at the unity-gain crossover,
which is clearly unstable. Best results are typically obtained
if R11 is selected such that the frequency of f
z
(R11) is in the
range of f
c
/4 to f
c
where f
c
is the unity-gain crossover fre-
quency.
The output capacitor (along with the load resistance R
L
)
forms a pole shown as f
(C
). Although the frequency of
this pole varies with R
, the loop gain also varies proportion-
ally which means the unity-gain crossover frequency stays
essentially constant regardless of R
L
value.
C12 can be used to create an additional pole most often
used for bypassing high-frequency switching noise on the
COMP pin. In many applications, this capacitor is unneces-
sary.
If C12 is used, best results are obtained if the frequency of
the pole is set in the range F
/2 to 2F
. This will provide
bypassing for the high-frequency noise caused by switching
transitions, but add only a small amount of negative phase
shift at the unity-gain crossover frequency.
The ESR of C
(as well as the capacitance of C
) form
the zero f
(ESR), which typically falls somewhere between
10 kHz and 50 kHz. This zero is very important, as it cancels
phase shift caused by the high-frequency pole f
(HF). It is
important to select C
with the correct value of capaci-
tance and ESR to place this zero near f
c
(typical range f
c
/2 to
f
c
).
As an example, we will present an analysis of the loop gain
plot for the 3.3V output shown in the Typical Application
Circuit. Values used for calculations are:
V
IN
= 12V
V
OUT
= 3.3V
@
4A
C
OUT
= C14 + C16 = 200 μF
ESR = 60 m
(each) = 30 m
total
F
OSC
= 200 kHz
f
p
(HF)
～
40 kHz
R13 = 20 m
L2 = 10 μH
R
L
= 0.825
DC gain = 55 dB
The values of compensation components will be: C10 =
2200 pF, R11 = 8.2k, and C12 will not be used. Using this
data, the poles and zeros are calculated:
f
p
(C10) = 1 / [2
π
X C10 (R11 + 160k) ] = 430 Hz
f
z
(R11) = 1 / [2
π
X R11 (C10 + C12) ] = 8.8 kHz
f
p
(C
OUT
) = 1 / [2
π
X R
L
X C
OUT
] = 960 Hz
f
z
(ESR) = 1 / [2
π
X ESR X C
OUT
] = 27 kHz
f
p
(HF)
～
40 kHz
Using these values, the calculated gain plot is shown in
Figure 6
10014805
FIGURE 4. Typical Compensation Network
10014806
FIGURE 5. Typical Loop Gain Plot
L
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