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參數(shù)資料
| 型號： | LM2619MTCX |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 500mA Step-Down DC-DC Converter |
| 中文描述： | 1.1 A SWITCHING REGULATOR, 1000 kHz SWITCHING FREQ-MAX, PDSO14 |
| 封裝： | MO-153AB, TSSOP-14 |
| 文件頁數(shù)： | 14/16頁 |
| 文件大小： | 799K |
| 代理商： | LM2619MTCX |
Application Information
(Continued)
LM2619MTC. Saturation occurs when the magnetic flux den-
sity from current through the windings of the inductor ex-
ceeds what the inductor’s core material can support with a
corresponding magnetic field.
CAPACITOR SELECTION
Use a 10μF ceramic input capacitor. Use X7R or X5R types,
do not use Y5V.
Use of tantalum capacitors is not recommended.
Ceramic capacitors provide an optimal balance between
small size, cost, reliability and performance for cell phones
and similar applications. A 22μF ceramic output capacitor is
recomended for applications that require increased toler-
ance to heavy load transients. A 10μF ceramic output ca-
pacitor can be used in applications where the worst case
load transient step is less than 200mA. Use of a 10μF output
capacitor trades off smaller size for an increase in output
voltage ripple, and undershoot during load transients.
Table
2
lists suggested capacitors and suppliers.
The input filter capacitor supplies current to the PFET switch
of the LM2619MTC in the first part of each cycle and reduces
voltage ripple imposed on the input power source. The out-
put filter capacitor smoothes out current flow from the induc-
tor to the load, helps maintain a steady output voltage during
transient load changes and reduces output voltage ripple.
These capacitors must be selected with sufficient capaci-
tance and sufficiently low ESR to perform these functions.
The ESR, or equivalent series resistance, of the filter capaci-
tors is a major factor in voltage ripple.
TABLE 2. Suggested Capacitors and Their Suppliers
Model
Type
Vendor
Phone
FAX
C1, C2 (Input or Output Filter Capacitor)
C2012X5ROJ106M
JMK212BJ106MG
ECJ3YB0J106K
JMK325BJ226MM
C3225X5RIA226M
Ceramic
Ceramic
Ceramic
Ceramic
Ceramic
TDK
Taiyo-Yuden
Panasonic
Taiyo-Yuden
TDK
847-803-6100
847-925-0888
714-373-7366
847-925-0888
847-803-6100
847-803-6296
847-925-0899
714-373-7323
847-925-0899
847-803-6296
BOARD LAYOUT CONSIDERATIONS
PC board layout is an important part of DC-DC converter
design. Poor board layout can disrupt the performance of a
DC-DC converter and surrounding circuitry by contributing to
EMI, ground bounce, and resistive voltage loss in the traces.
These can send erroneous signals to the DC-DC converter
IC, resulting in poor regulation or instability. Poor layout can
also result in reflow problems leading to poor solder joints
between the TSSOP package and board pads. Poor solder
joints can result in erratic or degraded performance.
Good layout for the LM2619MTC can be implemented by
following a few simple design rules.
1.
Follow the land pattern recomendation in the datasheet.
2.
Place the LM2619MTC, inductor and filter capacitors
close together and make the traces short.
The traces
between these components carry relatively high switch-
ing currents and act as antennas. Following this rule
reduces radiated noise. Place the capacitors and induc-
tor within 0.2 in. (5 mm) of the LM2619MTC.
3.
Arrange the components so that the switching current
loops curl in the same direction.
During the first half of
each cycle, current flows from the input filter capacitor,
through the LM2619MTC and inductor to the output filter
capacitor and back through ground, forming a current
loop. In the second half of each cycle, current is pulled
up from ground, through the LM2619MTC by the induc-
tor, to the output filter capacitor and then back through
ground, forming a second current loop. Routing these
loops so the current curls in the same direction prevents
magnetic field reversal between the two half-cycles and
reduces radiated noise.
4.
Connect the ground pins of the LM2619MTC, and filter
capacitors together using generous component-side
copper fill as a pseudo-ground plane. Then, connect this
to the ground-plane (if one is used) with several vias.
This reduces ground-plane noise by preventing the
switching currents from circulating through the ground
plane.
It
also
reduces
LM2619MTC by giving it a low-impedance ground con-
nection.
Use wide traces between the power components and for
power connections to the DC-DC converter circuit.
This
reduces voltage errors caused by resistive losses across
the traces.
Connect the dual pins of the device together on the pcb
for high efficiency.
Route noise sensitive traces, such as the voltage feed-
back path, away from noisy traces between the power
components.
The voltage feedback trace must remain
close to the LM2619MTC circuit and should be routed
directly from V
at the output capacitor and should be
routed opposite to noise components. This reduces EMI
radiated onto the DC-DC converter’s own voltage feed-
back trace.
Place noise sensitive circuitry, such as radio IF blocks,
away from the DC-DC converter, CMOS digital blocks
and other noisy circuitry.
Interference with noise-
sensitive circuitry in the system can be reduced through
distance.
In mobile phones, for example, a common practice is to
place the DC-DC converter on one corner of the board,
arrange the CMOS digital circuitry around it (since this also
generates noise), and then place sensitive preamplifiers and
IF stages on the diagonally opposing corner. Often, the
sensitive circuitry is shielded with a metal pan and power to
it is post-regulated to reduce conducted noise, using low-
dropout linear regulators.
ground
bounce
at
the
5.
6.
7.
8.
L
www.national.com
14
PrintDate=2003/08/20 PrintTime=18:54:06 801627bc ds200651_p Rev. No. 1.25
cmserv
Proof
Seq=14
Book
Extract
End
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