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參數(shù)資料
| 型號： | LM1253A |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Monolithic Triple 180 MHz I2C CRT Pre-amp With Integrated Analog On Screen Display (OSD) Generator |
| 中文描述： | 單片三180兆赫的I2C顯像管預(yù)先集成在屏幕顯示（OSD）發(fā)生器模擬放大器 |
| 文件頁數(shù)： | 47/57頁 |
| 文件大小： | 1621K |
| 代理商： | LM1253A |
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Control Register Definitions
(Continued)
Bits 21–18:
Enhanced Feature Bits. The enhanced features are determined as follows:
Bits 21–28
0000b
0001b
0010b
0011b
01XXb
1000b
1001b
1010b
1011b
1100b
1101b
1110b
1111b
Description
Normal (no enhanced features enabled).
Blinking.
Shadowing.
Bordering.
RESERVED.
Raised Box.
Blinking and Raised Box.
Depressed Box.
Blinking and Depressed Box.
Heavy Raised Box.
Blinking and Heavy Raised Box.
Heavy Depressed Box.
Blinking and Heavy Depressed Box.
Bits 31–24:
Reserved
FOUR-COLOR ATTRIBUTE FORMAT
REGISTER NAME: ATT4C7n (8507h +(n*4)), ATT4C6n (8506h +(n*4)),
where n = attribute code
(See Table 13)
Bit 63
Bit 56
Bit 55
Bit 48
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
C4B2
C4B1
REGISTER NAME: ATT4C5n (8505h +(n*4)), ATT4C4n (8504h +(n*4)),
where n = attribute code
(See Table 13)
Bit 47
Bit 40
Bit 39
Bit 32
C4B0
C4G2
C4G1
C4G0
C4R2
C4R1
C4R0
C3B2
C3B1
C3B0
C3G2
C3G1
C3G0
C3R2
C3R1
C3R0
REGISTER NAME: ATT4C3n (8503h +(n*4)), ATT4C2n (8502h +(n*4)),
where n = attribute code
(See Table 13)
Bit 31
Bit 24
Bit 23
Bit 16
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
EFB3
EFB2
EFB1
EFB0
C2B2
C2B1
REGISTER NAME: ATT4C1n (8501h +(n*4)), ATT4C0n (8500h +(n*4)),
where n = attribute code
(See Table 13)
Bit 15
Bit 8
Bit 7
Bit 0
C2B0
C2G2
C2G1
C2G0
C2R2
C2R1
C2R0
C1B2
C1B1
C1B0
C1G2
C1G1
C1G0
C1R2
C1R1
C1R0
Bits 8–0:
Color 1. These nine bits indicate the value of the color to be displayed as Color 1. This is considered to be the back-
ground color and is displayed when the corresponding pixel data bit is 00b
Color 2. These nine bits indicate the value of the color to be displayed as Color 2. This is displayed when the cor-
responding pixel data bit is 01b
Enhanced Feature Bits. The enhanced features are determined as follows:
Bits 17–9:
Bits 21–18:
Bits 21–18
0000b
0001b
001Xb
01XXb
1000b
1001b
Description
Normal (no enhanced features enabled).
Blinking.
RESERVED.
RESERVED.
Raised Box.
Blinking and Raised Box.
L
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相關(guān)代理商/技術(shù)參數(shù) |
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| LM1253AN | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Monolithic Triple 180 MHz I2C CRT Pre-amp With Integrated Analog On Screen Display (OSD) Generator |
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