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參數(shù)資料
| 型號： | LH7A404N0F092B3 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 數(shù)學處理器 |
| 英文描述： | 32-Bit System-on-Chip |
| 封裝： | LH7A404N0F000B3<SOT1021-1 (LFBGA324)|<<http://www.nxp.com/packages/SOT1021-1.html<1<Always Pb-free,;LH7A404N0F092B3<SOT1021-1 (LFBGA324)|<<http://www.nxp.com/packages/SOT |
| 文件頁數(shù)： | 18/75頁 |
| 文件大?。?/td> | 1109K |
| 代理商： | LH7A404N0F092B3 |
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LH7A404
32-Bit System-on-Chip
18
Preliminary data sheet
NXP Semiconductors
SYSTEM DESCRIPTIONS
ARM922T Processor
The LH7A404 microcontroller features the ARM922T
cached core with an Advanced High-performance Bus
(AHB) interface. The processor is a member of the
ARM9T family of processors. For more information, see
the ARM document, ‘ARM922T Technical Reference
Manual’, available on ARM’s website at www.arm.com.
Clock and State Controller
The clocking scheme in the LH7A404 is based
around two primary oscillator inputs. These are the
14.7456 MHz input crystal and the 32.768 kHz real time
clock oscillator; see Figure 3. The 14.7456 MHz oscil-
lator supplies the main system clock domains for the
LH7A404. The 32.768 kHz oscillator controls the
power-down operations and real time clock peripheral.
The clock and state controller provides the clock gating
and frequency division necessary, and then supplies
the clocks to the processor and rest of the system. The
amount of clock gating that actually takes place
depends on the power saving mode selected.
The 32.768 kHz clock provides the source for the
Real Time Clock tree and power-down logic. This clock
is used for the power state control and is the only clock
in the LH7A404 that runs continuously. The 32.768 kHz
clock is divided down to 1 Hz for the Real Time Clock
counter using a ripple divider to save power.
The 14.7456 MHz source is used to generate the
main system clocks for the LH7A404. It is the source
for PLL1 and PLL2, the primary clock for the peripher-
als, and the source clock to the programmable clock
(PGM) divider.
PLL1 provides the main clock tree for the chip. It gen-
erates the following clocks: FCLK, HCLK, and PCLK.
FCLK is the clock that drives the ARM922T core.
HCLK is the main bus (AHB) clock, as such it clocks
all memory interfaces, bus arbitrators and the AHB
peripherals. HCLK is generated by dividing FCLK by 1,
2, 3, or 4. HCLK can be gated by the system to enable
low power operation.
PCLK is the peripheral bus (APB) clock. It is gener-
ated by dividing HCLK by either 2, 4, or 8.
PLL2 generates a fixed 48 MHz clock signal for the
USB peripheral.
Figure 2. Application Diagram
CODEC
BATTERY
DC to DC
VOLTAGE
GENERATION
CIRCUITRY
MULTIMEDIA
CARD
MMC/SD
SCI
PCMCIA
COMPACT
FLASH
USB
HOST
DEVICE
HOST
SDRAM
SRAM
ROM
FLASH
DMA
AC97
STN/TFT/
AD-TFT
IR
GPIO
SSP
UART
LH7A404
PC
CARD
LH7A404-2
1
2
3
4
5
6
7
8
9
*
0
#
BMI
SMART
CARD
TOUCH
SCREEN
CONTR.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LH7A404N0F092B3,55 | 功能描述:ARM微控制器 - MCU LCD,USB FS/HOST,MMU,ADC,BGA324 RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風格:SMD/SMT |
| LH7A404N0F092B3,551 | 制造商:NXP Semiconductors 功能描述:LH7A404 Series 3.6 V 266 MHZ Surface Mount 32-Bit System-on-Chip |
| LH7A404N0F092B3;55 | 功能描述:ARM微控制器 - MCU LCD USB FS/HOST MMU RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風格:SMD/SMT |
| LH7A404N0F092B3-S | 功能描述:ARM微控制器 - MCU ARM9 LCD USB HOST RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風格:SMD/SMT |
| LH7A405 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
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