參數(shù)資料
型號: LH5481
廠商: Sharp Corporation
英文描述: Cascadable 64 x 8 FIFO Cascadable 64 x 9 FIFO
中文描述: 級聯(lián)64 × 8的FIFO級聯(lián)64 × 9先進先出
文件頁數(shù): 5/16頁
文件大?。?/td> 125K
代理商: LH5481
AC ELECTRICAL CHARACTERISTICS
1
(Over Operating Range)
SYMBOL
PARAMETER
15MHz
25MHz
35MHz
UNITS
MIN
MAX
MIN
MAX
MIN
MAX
f
O
Operating Frequency
2
SI HIGH Time
3,8
SI LOW Time
3,8
Data Setup to SI
4
Data Hold from SI
4
15
25
35
MHz
t
PHSI
15
11
9
ns
t
PLSI
20
18
17
ns
t
SSI
–1
–1
–1
ns
t
HSI
14
12
10
ns
t
DLIR
Delay, SI HIGH to IR LOW
20
18
16
ns
t
DHIR
Delay, SI LOW to IR HIGH
SO HIGH Time
3
SO LOW Time
3
24
20
18
ns
t
PHSO
15
11
9
ns
t
PLSO
20
18
17
ns
t
DLOR
Delay, SO HIGH to OR LOW
20
18
16
ns
t
DHOR
Delay, SO LOW to OR HIGH
24
20
18
ns
t
SOR
Data Setup to OR HIGH
–1
–1
–1
ns
t
HSO
Data Hold from SO LOW
0
0
0
ns
t
FT
Fallthrough Time
36
34
30
ns
t
BT
Bubblethrough Time
Data Setup to IR
5
Data Hold from IR
5
Input Ready Pulse HIGH
8
Output Ready Pulse HIGH
8
OE LOW to LOW Z (LH5481)
6,9
OE HIGH to HIGH Z (LH5481)
6,9
28
26
25
ns
t
SIR
5
5
5
ns
t
HIR
5
5
5
ns
t
PIR
7
7
7
ns
t
POR
7
7
7
ns
t
DLZOE
35
30
25
ns
t
DHZOE
35
30
25
ns
t
DHHF
SI LOW to HF HIGH
40
40
36
ns
t
DLHF
SO LOW to HF LOW
40
40
36
ns
t
DLAFE
SO or SI LOW to AFE LOW
40
40
36
ns
t
DHAFE
SO or SI LOW to AFE HIGH
40
40
36
ns
t
PMR
MR Pulse Width
35
35
35
ns
t
DSI
MR HIGH to SI HIGH
MR LOW to OR LOW
7
MR LOW to IR HIGH
7
MR LOW to Output LOW
7
25
25
22
ns
t
DOR
25
25
20
ns
t
DIR
25
25
20
ns
t
LXMR
25
25
20
ns
t
AFE
MR LOW to AFE HIGH
30
30
30
ns
t
HF
MR LOW to HF LOW
30
30
30
ns
t
OD
SO LOW to Next Data Out Valid
26
22
20
ns
NOTES:
1.
All time measurements performed at ‘AC Test Conditions.’
2.
f
O
= f
SI
= f
SO
.
3.
t
PHSI
+ t
PLSI
= t
PHSO
+ t
PLSO
= I/f
O
.
4
t
SSI
and t
HSI
apply when memory is not full.
5.
t
SIR
and t
HIR
apply when memory is full and SI is HIGH.
6.
High-Z transitions are referenced to the steady-state V
OH
– 500 mV and V
OL
+ 500 mV levels on the output.
7.
After reset goes LOW, all Data outputs will be at LOW level, IR goes HIGH and OR goes LOW.
8.
Common dash number devices are guaranteed by design to function properly in a cascaded configuration.
64
×
8 / 64
×
9 FIFO
LH5481/91
5
相關(guān)PDF資料
PDF描述
LH5493 4K x 9 Parallel-to Serial FIFO
LH5496-50 CMOS 512 X 9 FIFO
LH5496-65 CMOS 512 X 9 FIFO
LH5496-80 CMOS 512 X 9 FIFO
LH5496D-15 CMOS 512 X 9 FIFO
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LH5481D-15 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Asynchronous FIFO
LH5481D-25 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Asynchronous FIFO
LH5481D-35 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Asynchronous FIFO
LH5481U-15 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Asynchronous FIFO
LH5481U-25 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Asynchronous FIFO