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參數(shù)資料
| 型號： | LH540204 |
| 廠商： | Sharp Corporation |
| 英文描述： | CMOS 4096 x 9 Asynchronous FIFO |
| 中文描述： | 4096 × 9的CMOS異步FIFO |
| 文件頁數(shù)： | 7/18頁 |
| 文件大小： | 156K |
| 代理商： | LH540204 |
OPERATIONAL MODES (cont’d)
Compound FIFO Expansion
A combination of word-width expansion and depth
cascading may be implemented easily by operating
groups of depth-cascaded FIFOs in parallel.
Bidirectional FIFO Operation
Bidirectional data buffering between two systems may
be implemented by operating LH540204 devices in par-
allel, but in opposite directions. The Data In inputs of each
LH540204 are tied to the corresponding Data Out outputs
of another LH540204, which is operating in the opposite
direction, to form a single bidirectional bus interface. Care
must be taken to assure that the appropriate read, write,
and flag signals are routed to each system. Both word-
width expansion and depth cascading may be used in
bidirectional applications.
LH540204
DEPTH EXPANSION
BLOCK
LH540204
DEPTH EXPANSION
BLOCK
LH540204
DEPTH EXPANSION
BLOCK
Q
0
- Q
8
DATA OUT
D
N-9
-
D
N-1
D
18
- D
N-1
D
9
- D
N-1
D
0
- D
N-1
DATA IN
R
W
RS
Q
0
- Q
N-1
Q
0
- Q
17
540204-20
ARRAY STORES
N-BIT WORDS.
Q
0
- Q
N-10
Figure 7. Compound FIFO Expansion
LH540204
LH540204
SYSTEM A
SYSTEM B
Qb
0 - 8
Db
0 - 8
Da
0 - 8
Qa
0 - 8
XI
Wb
Ra
EFa
HFa
RTa
RS
FFb
RTb
HFb
EFb
Rb
540204-21
XI
Wa
FFa
RS
Figure 8. Bidirectional FIFO Operation
(4096
×
9
×
2)
CMOS 4096
×
9 Asynchronous FIFO
LH540204
7
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LH540204-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x9 Asynchronous FIFO |
| LH540204-25 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x9 Asynchronous FIFO |
| LH540204-35 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x9 Asynchronous FIFO |
| LH540204-50 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x9 Asynchronous FIFO |
| LH540204-65 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x9 Asynchronous FIFO |
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