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參數(shù)資料
| 型號(hào)： | LH28F160S3HT-L13 |
| 英文描述： | EEPROM|FLASH|1MX16/2MX8|CMOS|TSSOP|56PIN|PLASTIC |
| 中文描述： | 的EEPROM | FLASH動(dòng)畫(huà)| 1MX16/2MX8 |的CMOS | TSSOP封裝| 56PIN |塑料 |
| 文件頁(yè)數(shù)： | 46/56頁(yè) |
| 文件大?。?/td> | 373K |
| 代理商： | LH28F160S3HT-L13 |
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SYMBOL
t
AVAV
PARAMETER
NOTE
MIN.
70
MAX.
MIN.
80
MAX.
MIN.
100
MAX.
Write Cycle Time
RP# High Recovery to CE#
Going Low
WE# Setup to CE# Going Low
CE# Pulse Width
WP# V
IH
Setup to CE# Going High
V
PP
Setup to CE# Going High
Address Setup to CE# Going High
Data Setup to CE# Going High
Data Hold from CE# High
Address Hold from CE# High
WE# Hold from CE# High
CE# Pulse Width High
CE# High to STS Going Low
Write Recovery before Read
V
PP
Hold from Valid SRD,
STS High Z
WP# V
IH
Hold from Valid SRD,
STS High Z
NOTES :
1.
In systems where CE# defines the write pulse width
(within a longer WE# timing waveform), all setup, hold
and inactive WE# times should be measured relative to
the CE# waveform.
2.
Sampled, not 100% tested.
3.
Refer to
Table 3
for valid A
IN
and D
IN
for block erase,
full chip erase, (multi) word/byte write or block lock-bit
configuration.
4.
V
PP
should be held at V
PPH1
until determination of block
erase, full chip erase, (multi) word/byte write or block
lock-bit configuration success (SR.1/3/4/5 = 0).
ns
t
PHEL
2
1
1
1
μs
t
WLEL
t
ELEH
t
SHEH
t
VPEH
t
AVEH
t
DVEH
t
EHDX
t
EHAX
t
EHWH
t
EHEL
t
EHRL
t
EHGL
0
50
100
100
40
40
5
5
0
25
0
50
100
100
40
40
5
5
0
25
0
50
100
100
40
40
5
5
0
25
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2
2
3
3
90
90
90
0
0
0
t
QVVL
2, 4
0
0
0
ns
t
QVSL
2, 4
0
0
0
ns
LH28F160S5-L/S5H-L
- 46 -
VERSIONS
V
CC
±0.25 V
V
CC
±0.5 V
(NOTE 5)
LH28F160S5-L70
(NOTE 6)
LH28F160S5-L10
(NOTE 6)
LH28F160S5-L70
UNIT
V
CC
= 5.0±0.25 V, 5.0±0.5 V, T
A
= 0 to +70°C
6.2.6 ALTERNATIVE CE#-CONTROLLED WRITES
(NOTE 1)
[LH28F160S5-L]
5.
See
Fig. 12
"
Transient Input/Output Reference
Waveform
" and
Fig. 14
"
Transient Equivalent Testing
Load Circuit
" (High Speed Configuration) for testing
characteristics.
See
Fig. 13
"
Transient Input/Output Reference
Waveform
" and
Fig. 14
"
Transient Equivalent Testing
Load Circuit
" (Standard Configuration) for testing
characteristics.
6.
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| LH28F160S3R-L10 | x8/x16 Flash EEPROM |
| LH28F160S3R-L13 | EEPROM|FLASH|1MX16/2MX8|CMOS|TSSOP|56PIN|PLASTIC |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LH28F160S3HT-L75A | 制造商:Sharp Microelectronics Corporation 功能描述: |
| LH28F160S3HT-TF | 功能描述:IC FLASH 16MBIT 100NS 56TSOP RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SDRAM 存儲(chǔ)容量:256M（8Mx32） 速度:143MHz 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:托盤 其它名稱:Q2841869 |
| LH28F160S3-L10 | 制造商:SHARP 制造商全稱:Sharp Electrionic Components 功能描述:16-MBIT(2MBx8/1MBx16) Smart 3 Flash MEMORY |
| LH28F160S3-L13 | 制造商:SHARP 制造商全稱:Sharp Electrionic Components 功能描述:16-MBIT(2MBx8/1MBx16) Smart 3 Flash MEMORY |
| LH28F160S3NS-L10 | 制造商:SHARP 制造商全稱:Sharp Electrionic Components 功能描述:16-MBIT(2MBx8/1MBx16) Smart 3 Flash MEMORY |
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