- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄358790 > LH28F016SUT-70 (Sharp Corporation) 16M (1M x 16 , 2M x 8) Flash Memory PDF資料下載
參數(shù)資料
| 型號： | LH28F016SUT-70 |
| 廠商： | Sharp Corporation |
| 英文描述： | 16M (1M x 16 , 2M x 8) Flash Memory |
| 中文描述： | 1,600（100萬× 16，200萬× 8）閃存 |
| 文件頁數(shù)： | 5/37頁 |
| 文件大?。?/td> | 326K |
| 代理商： | LH28F016SUT-70 |
第1頁第2頁第3頁第4頁當前第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁
16M (1M × 16, 2M × 8) Flash Memory
LH28F016SU
5
PIN DESCRIPTION (Continued)
SYMBOL
TYPE
NAME AND FUNCTION
WP
INPUT
WRITE PROTECT:
Erase blocks can be locked by writing a non-volatile lock-bit for
each block. When WP is low, those locked blocks as reflected by the Block-Lock Status
bits (BSR.6), are protected from inadvertent Data Writes or Erases. When WP is high,
all blocks can be Written or Erased regardless of the state of the lock-bits. The WP
input buffer is disabled when RP
transitions low (deep power-down mode).
BYTE
INPUT
BYTE ENABLE:
BYTE low places device x8 mode. All data is then input or output
on DQ
0
- DQ
7
, and DQ
8
- DQ
15
float. Address A
0
selects between the high and low
byte. BYTE high places the device in x16 mode, and turns off the A
0
input buffer.
Address A
1
, then becomes the lowest order address.
3.3/5.0 VOLT SELECT:
3/5
high configures internal circuits for 3.3 V operation. 3/5
low configures internal circuits for 5.0 V operation.
NOTES:
Reading the array with 3/5
high in a 5.0 V system could damage the
device. There is a significant delay from 3/5
switching to valid data.
3/5
INPUT
V
PP
SUPPLY
ERASE/WRITE POWER SUPPLY:
For erasing memory array blocks or writing
words/bytes/pages into the flash array.
V
CC
SUPPLY
DEVICE POWER SUPPLY (3.3 V ±0.3 V, 5.0 V ±0.5 V) (2.7 V ~ 3.6 V at Read
Operation)
: Do not leave any power pins floating.
GND
SUPPLY
GROUND FOR ALL INTERNAL CIRCUITRY:
Do not leave any ground pins floating.
NC
NO CONNECT:
No internal connection to die, lead may be driven or left floating.
The LH28F016SU incorporates two Page Buffers of
256 Bytes (128 Words) each to allow page data writes.
This feature can improve a system write performance
over previous flash memory devices.
All operations are started by a sequence of Write
commands to the device. Three Status Registers
(described in detail later) and a RY
/BY
output pin
provide information on the progress of the requested
operation.
While the LH28F008SA requires an operation to com-
plete before the next operation can be requested, the
LH28F016SU allows queuing of the next operation while
the memory executes the current operation. This elimi-
nates system overhead when writing several bytes in a
row to the array or erasing several blocks at the same
time. The LH2F016SUR-10 can also perform write op-
erations to one block of memory while performing erase
of another block.
The LH28F016SU provides user-selectable block
locking to protect code or data such as Device Drivers,
PCMCIA card information, ROM-Executable O/S or
Application Code. Each block has an associated non-
volatile lock-bit which determines the lock status of the
block. In addition, the LH28F016SU has a master Write
Protect pin (WP
) which prevents any modifications to
memory blocks whose lock-bits are set.
A Command User Interface (CUI) serves as the sys-
tem interface between the microprocessor or
microcontroller and the internal memory operation.
Internal Algorithm Automation allows Byte/Word
Writes and Block Erase operations to be executed
using a Two-Write command sequence to the CUI in
the same way as the LH28F008SA 8M Flash memory.
A Superset of commands have been added to the
basic LH28F008SA command-set to achieve higher
write performance and provide additional capabilities.
These new commands and features include:
Page Buffer Writes to Flash
Command Queuing Capability
Automatic Data Writes During Erase
Software Locking of Memory Blocks
Two-Byte Successive Writes in 8-bit Systems
Erase All Unlocked Blocks
Writing of memory data is performed in either byte or
word increments typically within 8 μs, a 25% improve-
ment over the LH28F008SA. A Block Erase operation
erases one of the 32 blocks in typically 0.7 seconds,
independent of the other blocks, which is about 55%
improvement over the LH28F008SA.
相關PDF資料 |
PDF描述 |
|---|---|
| LH28F016SCT-L95 | 16M Flash Memory 2M (】8) |
| LH28F016LL | 16M (1M 】 16, 2M 】 8) Flash Memory |
| LH28F016SA | 16M (1M 】 16, 2M 】 8) Flash Memory |
| LH28F016SANS | 16 Mbit(1 Mbit x 16, 2 Mbit x 8) |
| LH28F016SC-L | 16 M-bit (2 MB x 8) SmartVoltage Flash Memories |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LH28F020SU-L | 制造商:SHARP 制造商全稱:Sharp Electrionic Components 功能描述:2M (256K 】 8) Flash Memory |
| LH28F020SU-N | 制造商:SHARP 制造商全稱:Sharp Electrionic Components 功能描述:2M (256K 】 8) Flash Memory |
| LH28F020SUN-L12 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Flash EEPROM |
| LH28F032SUTD-70 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8/x16 Flash EEPROM Module |
| LH28F040SUTD-Z4 | 制造商:SHARP 制造商全稱:Sharp Electrionic Components 功能描述:4M (512K 】 8) Flash Memory |
發(fā)布緊急采購，3分鐘左右您將得到回復。