參數(shù)資料
型號: LH28F016SCT-Z4
英文描述: EEPROM|FLASH|2MX8|CMOS|TSSOP|40PIN|PLASTIC
中文描述: 的EEPROM | FLASH動畫| 2MX8 |的CMOS | TSSOP封裝| 40PIN |塑料
文件頁數(shù): 26/56頁
文件大?。?/td> 373K
代理商: LH28F016SCT-Z4
LH28F160S5-L/S5H-L
- 26 -
Word/Byte Write
Complete
Start
Write 70H
Read
Status Register
0
0
Yes
No
SR.7 =
1
SR.7 =
1
Write 40H or 10H,
Address
Write Word/Byte
Data and Address
Suspend Word/Byte
Write Loop
Suspend
Word/Byte
Write
Read
Status Register
Full Status
Check if Desired
BUS
OPERATION
COMMAND
COMMENTS
Standby
Check SR.1
1 = Device Protect Detect
WP# = V
IL
, Block Lock-Bit is Set
Only required for systems implement-
ing block lock-bit configuration
SR.4, SR.3 and SR.1 are only cleared by the Clear Status
Register command in cases where multiple locations are
written before full status is checked.
If error is detected, clear the status register before attempting
retry or other error recovery.
Repeat for subsequent word/byte writes.
SR full status check can be done after each word/byte write
or after a sequence of word/byte writes.
Write FFH after the last word/byte write operation to place
device in read array mode.
Standby
Check SR.3
1 = V
PP
Error Detect
Standby
Check SR.4
1 = Data Write Error
BUS
OPERATION
Write
Read
Standby
Standby
COMMAND
Read Status
Register
COMMENTS
Data = 70H
Addr = X
Status Register Data
Status Register Data
Check SR.7
1 = WSM Ready
0 = WSM Busy
Check SR.7
1 = WSM Ready
0 = WSM Busy
Word/Byte
Write
Setup Word/
Byte Write
Write
Write
Read
Data = Data to be Written
Addr = Location to be Written
Data = 40H or 10H
Addr = Location to be Written
SR.3 =
FULL STATUS CHECK PROCEDURE
Read Status Register
Data (See Above)
V
PP
Range Error
1
0
SR.1 =
Device Protect
Error
1
0
Word/Byte Write
Successful
SR.4 =
Word/Byte Write
Error
1
0
Fig. 5 Automated Word/Byte Write Flowchart
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