- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄369759 > LH28F016SCT-L120 EEPROM PDF資料下載
參數(shù)資料
| 型號： | LH28F016SCT-L120 |
| 元件分類： | EEPROM |
| 英文描述： | EEPROM |
| 中文描述： | EEPROM的 |
| 文件頁數(shù)： | 9/56頁 |
| 文件大小： | 373K |
| 代理商： | LH28F016SCT-L120 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁當(dāng)前第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁
3 BUS OPERATION
The local CPU reads and writes flash memory in-
system. All bus cycles to or from the flash memory
conform to standard microprocessor bus cycles.
3.1
Information can be read from any block, identifier
codes, query structure, or status register
independent of the V
PP
voltage. RP# must be at
V
IH
.
Read
The first task is to write the appropriate read mode
command (Read Array, Read Identifier Codes,
Query or Read Status Register) to the CUI. Upon
initial device power-up or after exit from deep
power-down mode, the device automatically resets
to read array mode. Five control pins dictate the
data flow in and out of the component : CE#
(CE
0
#, CE
1
#), OE#, WE#, RP# and WP#. CE
0
#,
CE
1
# and OE# must be driven active to obtain data
at the outputs. CE
0
# and CE
1
# are the device
selection control, and when active enables the
selected memory device. OE# is the data output
(DQ
0
-DQ
15
) control and when active drives the
selected memory data onto the I/O bus. WE# and
RP# must be at V
IH
.
Fig. 15
and
Fig. 16
, illustrate
a read cycle.
3.2
With OE# at a logic-high level (V
IH
), the device
outputs are disabled. Output pins DQ
0
-DQ
15
are
placed in a high-impedance state.
Output Disable
3.3
Either CE
0
# or CE
1
# at a logic-high level (V
IH
)
places the device in standby mode which
substantially reduces device power consumption.
DQ
0
-DQ
15
outputs are placed in a high-impedance
state independent of OE#. If deselected during
block erase, full chip erase, (multi) word/byte write
and block lock-bit configuration, the device
continues functioning, and consuming active power
until the operation completes.
Standby
3.4
RP# at V
IL
initiates the deep power-down mode.
Deep Power-Down
In read modes, RP#-low deselects the memory,
places output drivers in a high-impedance state and
turns off all internal circuits. RP# must be held low
for a minimum of 100 ns. Time t
PHQV
is required
after return from power-down until initial memory
access outputs are valid. After this wake-up
interval, normal operation is restored. The CUI is
reset to read array mode and status register is set
to 80H.
During block erase, full chip erase, (multi) word/byte
write or block lock-bit configuration modes, RP#-low
will abort the operation. STS remains low until the
reset operation is complete. Memory contents being
altered are no longer valid; the data may be
partially erased or written. Time t
PHWL
is required
after RP# goes to logic-high (V
IH
) before another
command can be written.
As with any automated device, it is important to
assert RP# during system reset. When the system
comes out of reset, it expects to read from the flash
memory. Automated flash memories provide status
information when accessed during block erase, full
chip erase, (multi) word/byte write and block lock-bit
configuration. If a CPU reset occurs with no flash
memory reset, proper CPU initialization may not
occur because the flash memory may be providing
status information instead of array data. SHARP’s
flash memories allow proper CPU initialization
following a system reset through the use of the
RP# input. In this application, RP# is controlled by
the same RESET# signal that resets the system
CPU.
LH28F160S5-L/S5H-L
- 9 -
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LH28F016SCT-L150 | EEPROM |
| LH28F016SCT-L90 | x8 Flash EEPROM |
| LH28F016SCT-Z4 | EEPROM|FLASH|2MX8|CMOS|TSSOP|40PIN|PLASTIC |
| LH28F016SUR-10 | x8/x16 Flash EEPROM |
| LH28F016SUR-70 | x8/x16 Flash EEPROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LH28F016SCT-L150 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EEPROM |
| LH28F016SCT-L90 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Flash EEPROM |
| LH28F016SCT-L95 | 功能描述:IC FLASH 16MBIT 95NS 40TSOP RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:96 系列:- 格式 - 存儲器:閃存 存儲器類型:FLASH 存儲容量:16M（2M x 8，1M x 16） 速度:70ns 接口:并聯(lián) 電源電壓:2.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應(yīng)商設(shè)備封裝:48-TSOP 包裝:托盤 |
| LH28F016SCT-Z4 | 制造商:Sharp Microelectronics Corporation 功能描述:NOR Flash, 2M x 8, 40 Pin, Plastic, TSSOP |
| LH28F016SCT-ZR | 制造商:Sharp Microelectronics 功能描述:FLASH MEMORY 16MBIT (2MBITX8) |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。