參數(shù)資料
型號: LFX500B-4F900I
廠商: Lattice Semiconductor Corporation
英文描述: The ispXPGA architecture
中文描述: 在ispXPGA架構(gòu)
文件頁數(shù): 40/89頁
文件大小: 941K
代理商: LFX500B-4F900I
Lattice Semiconductor
ispXPGA Family Data Sheet
40
Switching Test Conditions
Figure 24 shows the output test load that is used for AC testing. The speci
fi
c values for resistance, capacitance,
voltage, and other test conditions are shown in Table 8.
Figure 24. Output Test Load, LVTTL and LVCMOS Standards
Table 8. Text Fixture Required Components
Test Condition
R
1
R
2
C
L
Timing Reference
VCCO
LVCMOS I/O, (L -> H, H -> L)
106
106
35pF
LVCMOS 3.3 = V
CCO
/2
LVCMOS 2.5 = V
CCO
/2
LVCMOS 1.8 = V
CCO
/2
0.9V
LVCMOS 3.3 = 3.0V
LVCMOS 2.5 = 2.3V
LVCMOS 1.8 = 1.65V
Default LVCMOS 1.8 I/O (Z -> H)
106
35pF
1.65V
Default LVCMOS 1.8 I/O (Z -> L)
106
35pF
0.9V
1.65V
Default LVCMOS 1.8 I/O (H -> Z)
106
5pF
V
OH
- 0.3
V
OL
+ 0.3
1.65V
Default LVCMOS 1.8 I/O (L -> Z)
106
5pF
1.65V
Note: Output test conditions for all other interfaces are determined by the respective standards.
V
CCO
R1
R2
CL*
Device
Output
*C
L
includes test fixture and probe capacitance.
Test
Point
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