參數(shù)資料
型號: LFX1200C-04F900C
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: FPGA
英文描述: The ispXPGA architecture
中文描述: FPGA, 3844 CLBS, 1250000 GATES, PBGA900
封裝: FPBGA-900
文件頁數(shù): 39/89頁
文件大小: 941K
代理商: LFX1200C-04F900C
Lattice Semiconductor
ispXPGA Family Data Sheet
39
ispXP sysCONFIG Port Timing Speci
fi
cations
Boundary Scan Timing
Symbol
Timing Parameter
Min.
Typ.
Max.
Units
sysCONFIG Write Cycle Timing
t
SUCS
t
HCS
t
SUWD
t
HWD
t
PRGM
t
WINIT
t
IODISS
t
WRDY
t
IOENSS
t
WH
t
WL
f
MAXW
sysCONFIG Read Cycle Timing
Input setup time of CS to CCLK rise
12
ns
Hold time of CS to CCLK Rise
0
ns
Input setup time of write data to CCLK rise
12
ns
Hold time of write data to CCLK rise
0
ns
Low time to reset device SRAM
5
50
ns
INIT pulse width
4
ms
User I/O disable
30
ns
Time to write data into SRAM
4
ms
User I/O enable
30
ns
Write clock High pulse width
12
ns
Write clock Low pulse width
12
ns
Write f
MAX
25
MHz
t
HREAD
t
SUREAD
t
RH
t
RL
f
MAXR
t
CORD
Hold time of READ to CCLK rise
0
ns
Input setup time of READ High to CCLK rise
30
ns
READ clock high pulse width
12
ns
READ clock low pulse width
15
ns
Read f
MAX
Clock to out for read data
25
MHz
25
ns
Parameter
Description
Min.
Max.
Units
t
BTCP
t
BTCPH
t
BTCPL
t
BTS
t
BTH
t
BTRF
t
BTCO
t
BTCODIS
t
BTCOEN
t
BTCRS
t
BTCRH
t
BUTCO
t
BTUODIS
t
BTUPOEN
TCK [BSCAN] Clock Pulse Width
40
ns
TCK [BSCAN] Clock Pulse Width High
20
ns
TCK [BSCAN] Clock Pulse Width Low
20
ns
TCK [BSCAN] Setup Time
8
ns
TCK [BSCAN] Hold Time
10
ns
TCK [BSCAN] Rise/Fall Time
50
mV/ns
TAP Controller Falling Edge of Clock to Valid Output
18
ns
TAP Controller Falling Edge of Clock to Valid Disable
18
ns
TAP Controller Falling Edge of Clock to Valid Enable
18
ns
BSCAN Test Capture Register Setup Time
8
ns
BSCAN Test Capture Register Hold Time
25
ns
BSCAN Test Update Register, Falling Edge of Clock to Valid Output
45
ns
BSCAN Test Update Register, Falling Edge of Clock to Valid Disable
20
ns
BSCAN Test Update Register, Falling Edge of Clock to Valid Enable
20
ns
相關(guān)PDF資料
PDF描述
LFX500C-3F900C Circular Connector; No. of Contacts:26; Series:; Body Material:Aluminum; Connecting Termination:Solder; Connector Shell Size:16; Circular Contact Gender:Socket; Circular Shell Style:Box Mount Receptacle; Insert Arrangement:16-26 RoHS Compliant: No
LFX1200C-3F900C Circular Connector; No. of Contacts:26; Series:; Body Material:Aluminum; Connecting Termination:Solder; Connector Shell Size:16; Circular Contact Gender:Socket; Circular Shell Style:Box Mount Receptacle; Insert Arrangement:16-26 RoHS Compliant: No
LFX500C-3F900I Circular Connector; No. of Contacts:26; Series:; Body Material:Aluminum; Connecting Termination:Solder; Connector Shell Size:16; Circular Contact Gender:Socket; Circular Shell Style:Box Mount Receptacle; Insert Arrangement:16-26 RoHS Compliant: No
LFX1200C-3F900I The ispXPGA architecture
LFX200C-4F900C Circular Connector; Body Material:Aluminum Alloy; Series:MS3112; No. of Contacts:8; Connector Shell Size:16; Connecting Termination:Solder; Circular Shell Style:Box Mount Receptacle; Circular Contact Gender:Pin RoHS Compliant: No
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LFX1200C-04FE680C 功能描述:FPGA - 現(xiàn)場可編程門陣列 15376 LUT-4 496 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
LFX1200C-04FEN680C 功能描述:FPGA - 現(xiàn)場可編程門陣列 1.25M Gt ispJTAG 1. 8V -4 Spd RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
LFX1200C-04FEN680C2 功能描述:FPGA - 現(xiàn)場可編程門陣列 15376 LUT-4 496 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
LFX1200C-3F256C 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:ispXPGA Family
LFX1200C-3F256I 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:ispXPGA Family