參數(shù)資料
型號： LFECP6E-3T144C
廠商： LATTICE SEMICONDUCTOR CORP
元件分類： FPGA
英文描述： LatticeECP/EC Family Data Sheet
中文描述： FPGA, 768 CLBS, 6100 GATES, 420 MHz, PQFP144
封裝： 20 X 20 MM, TQFP-144
文件頁數(shù)： 6/117頁
文件大小： 557K
代理商： LFECP6E-3T144C
2-3
Architecture
Lattice Semiconductor
LatticeECP/EC Family Data Sheet
PFU and PFF Blocks
The core of the LatticeECP/EC devices consists of PFU and PFF blocks. The PFUs can be programmed to perform
Logic, Arithmetic, Distributed RAM and Distributed ROM functions. PFF blocks can be programmed to perform
Logic, Arithmetic and ROM functions. Except where necessary, the remainder of the data sheet will use the term
PFU to refer to both PFU and PFF blocks.
Each PFU block consists of four interconnected slices, numbered 0-3 as shown in Figure 2-3. All the interconnec-
tions to and from PFU blocks are from routing. There are 53 inputs and 25 outputs associated with each PFU block.
Figure 2-3. PFU Diagram
Slice
Each slice contains two LUT4 lookup tables feeding two registers (programmed to be in FF or Latch mode), and
some associated logic that allows the LUTs to be combined to perform functions such as LUT5, LUT6, LUT7 and
LUT8. There is control logic to perform set/reset functions (programmable as synchronous/asynchronous), clock
select, chip-select and wider RAM/ROM functions. Figure 2-4 shows an overview of the internal logic of the slice.
The registers in the slice can be con
fi
gured for positive/negative and edge/level clocks.
There are 14 input signals: 13 signals from routing and one from the carry-chain (from adjacent slice or PFU).
There are 7 outputs: 6 to routing and one to carry-chain (to adjacent PFU). Table 2-1 lists the signals associated
with each slice.
Slice 0
LUT4 &
CARRY
LUT4 &
CARRY
FF/
Latch
D
FF/
Latch
D
Slice 1
LUT4 &
CARRY
LUT4 &
CARRY
Slice 2
LUT4 &
CARRY
LUT4 &
CARRY
From
Routing
To
Routing
Slice 3
LUT4 &
CARRY
LUT4 &
CARRY
FF/
Latch
D
FF/
Latch
D
FF/
Latch
D
FF/
Latch
D
FF/
Latch
D
FF/
Latch
D
相關PDF資料
PDF描述
LFECP6E-3T144I LatticeECP/EC Family Data Sheet
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LFECP6E-4F256I LatticeECP/EC Family Data Sheet
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相關代理商/技術參數(shù)
參數(shù)描述
LFECP6E-3T144I 功能描述:FPGA - 現(xiàn)場可編程門陣列 6.1 LUT 97 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
LFECP6E-3TN100C 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
LFECP6E-3TN100I 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
LFECP6E-3TN144C 功能描述:FPGA - 現(xiàn)場可編程門陣列 6.1 LUT 97 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
LFECP6E-3TN144I 功能描述:FPGA - 現(xiàn)場可編程門陣列 6.1 LUT 97 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
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