參數(shù)資料
型號(hào): LFECP33E-3F672C
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: FPGA
英文描述: LatticeECP/EC Family Data Sheet
中文描述: FPGA, 4096 CLBS, 32800 GATES, 420 MHz, PBGA672
封裝: 27 X 27 MM, FPBGA-672
文件頁(yè)數(shù): 23/117頁(yè)
文件大?。?/td> 557K
代理商: LFECP33E-3F672C
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2-20
Architecture
Lattice Semiconductor
LatticeECP/EC Family Data Sheet
Optimized DSP Functions
Lattice provides a library of optimized DSP IP functions. Some of the IPs planned for LatticeECP DSP are: Bit Cor-
relators, Fast Fourier Transform, Finite Impulse Response (FIR) Filter, Reed-Solomon Encoder/ Decoder, Turbo
Encoder/Decoders and Convolutional Encoder/Decoder. Please contact Lattice to obtain the latest list of available
DSP IPs.
Resources Available in the LatticeECP Family
Table 2-9 shows the maximum number of multipliers for each member of the LatticeECP family. Table 2-10 shows
the maximum available EBR RAM Blocks in each of the LatticeECP family. EBR blocks, together with Distributed
RAM can be used to store variables locally for the fast DSP operations.
Table 2-9. Number of DSP Blocks in LatticeECP Family
Table 2-10. Embedded SRAM in LatticeECP Family
DSP Performance of the LatticeECP Family
Table 2-11 lists the maximum performance in millions of MAC operations per second (MMAC) for each member of
the LatticeECP family.
Table 2-11. DSP Block Performance of LatticeECP Family
For further information on the sysDSP block, please see details of additional technical information at the end of this
data sheet.
Device
LFECP6
LFECP10
LFECP15
LFECP20
LFECP33
LFECP40
DSP Block
4
5
6
7
8
10
9x9 Multiplier
32
40
48
56
64
80
18x18 Multiplier
16
20
24
28
32
40
36x36 Multiplier
4
5
6
7
8
10
Device
LFECP6
LFECP10
LFECP15
LFECP20
LFECP33
LFECP40
EBR SRAM Block
10
30
38
46
58
70
Total EBR SRAM
(Kbits)
92
276
350
424
535
645
Device
LFECP6
LFECP10
LFECP15
LFECP20
LFECP33
LFECP40
DSP Block
4
5
6
7
8
10
DSP Performance
MMAC
3680
4600
5520
6440
7360
9200
相關(guān)PDF資料
PDF描述
LFEC33E-3F672I LatticeECP/EC Family Data Sheet
LFECP33E-3F672I LatticeECP/EC Family Data Sheet
LFEC33E-3F900C LatticeECP/EC Family Data Sheet
LFECP33E-3F900C LatticeECP/EC Family Data Sheet
LFEC33E-3F900I LatticeECP/EC Family Data Sheet
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LFECP33E-3F672I 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 32.8K LUTs 496 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
LFECP33E-3F900C 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
LFECP33E-3F900I 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
LFECP33E-3FN256C 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
LFECP33E-3FN256I 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet