參數(shù)資料
型號(hào)： LFECP10E-3FN484I
廠商： Lattice Semiconductor Corporation
文件頁數(shù)： 95/163頁
文件大?。?/td> 0K
描述： IC FPGA 10.2KLUTS 484FPBGA
標(biāo)準(zhǔn)包裝： 60
系列： ECP
邏輯元件/單元數(shù)： 10200
RAM 位總計(jì)： 282624
輸入/輸出數(shù)： 288
電源電壓： 1.14 V ~ 1.26 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 100°C
封裝/外殼： 484-BBGA
供應(yīng)商設(shè)備封裝： 484-FPBGA（23x23）
www.latticesemi.com
3-1
DC and Switching_02.0
September 2012
Data Sheet
2012 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
Recommended Operating Conditions
Absolute Maximum Ratings1, 2, 3
1. Stress above those listed under the “Absolute Maximum Ratings” may cause permanent damage to the device. Functional operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
2. Compliance with the Lattice
Thermal Management document is required.
3. All voltages referenced to GND.
Supply Voltage VCC . . . . . . . . . . . . . . . . . . . -0.5 to 1.32V
Supply Voltage VCCAUX . . . . . . . . . . . . . . . . -0.5 to 3.75V
Supply Voltage VCCJ . . . . . . . . . . . . . . . . . . -0.5 to 3.75V
Output Supply Voltage VCCIO . . . . . . . . . . . -0.5 to 3.75V
Dedicated Input Voltage Applied
4 . . . . . . . . -0.5 to 4.25V
I/O Tristate Voltage Applied
4 . . . . . . . . . . . . -0.5 to 3.75V
Storage Temperature (Ambient) . . . . . . . . . -65 to 150°C
Junction Temp. (Tj) . . . . . . . . . . . . . . . . . . . . . . . +125°C
4. Overshoot and undershoot of -2V to (VIHMAX + 2) volts is permitted for a duration of <20ns.
Symbol
Parameter
Min.
Max.
Units
VCC
Core Supply Voltage
1.14
1.26
V
VCCAUX
3
Auxiliary Supply Voltage
3.135
3.465
V
VCCPLL
PLL Supply Voltage for ECP/EC33
1.14
1.26
V
VCCIO
1, 2
I/O Driver Supply Voltage
1.140
3.465
V
VCCJ
1
Supply Voltage for IEEE 1149.1 Test Access Port
1.140
3.465
V
tJCOM
Junction Commercial Operation
0
85
°C
tJIND
Junction Industrial Operation
-40
100
°C
1. If VCCIO or VCCJ is set to 1.2V, they must be connected to the same power supply as VCC. If VCCIO or VCCJ is set to 3.3V, they must be con-
nected to the same power supply as VCCAUX.
2. See recommended voltages by I/O standard in subsequent table.
3. VCCAUX ramp rate must not exceed 3mV/s for commercial and 0.6 mV/s for industrial device operations during power up when transition-
ing between 0.8V and 1.8V.
Hot Socketing Specifications1, 2, 3, 4
1. Insensitive to sequence of VCC, VCCAUX and VCCIO. However, assumes monotonic rise/fall rates for VCC, VCCAUX and VCCIO.
2. 0 VCC VCC (MAX), 0 VCCIO VCCIO (MAX) or 0 VCCAUX VCCAUX (MAX).
3. IDK is additive to IPU, IPW or IBH.
4. LVCMOS and LVTTL only.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
Top and Bottom General Purpose sysI/Os (Banks 0, 1, 4 and 5), JTAG and Dedicated sysCONFIG Pins
IDK_TB
Input or I/O Leakage Current
0 VIN VIH (MAX.)
—
+/-1000
A
Left and Right General Purpose sysI/Os (Banks 2, 3, 6 and 7)
IDK_LR
Input or I/O Leakage Current
VIN VCCIO
——
+/-1000
A
VIN > VCCIO
—35—
mA
LatticeECP/EC Family Data Sheet
DC and Switching Characteristics
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