參數(shù)資料
型號： LFEC10E-4T144I
廠商： Lattice Semiconductor Corporation
元件分類： DC/DC變換器
英文描述： RS-S_D(Z) Series - Econoline Regulated DC-DC Converters; Input Voltage (Vdc): 48V; Output Voltage (Vdc): 3.3V; Power: 2W; 2:1 and 4:1 Wide Input Voltage Ranges; 1kVDC, 2kVD & 3kVDC Isolation; UL94V-0 Package Material; Continuous Short Circuit Protection; Low Noise; No External Capacitor needed; Efficiency to 83%
中文描述： LatticeECP / EC的系列數(shù)據(jù)手冊
文件頁數(shù)： 33/117頁
文件大?。?/td> 557K
代理商： LFEC10E-4T144I
2-30
Architecture
Lattice Semiconductor
LatticeECP/EC Family Data Sheet
options for drive strength, bus maintenance (weak pull-up, weak pull-down, or a bus-keeper latch) and open drain.
Other single-ended standards supported include SSTL and HSTL. Differential standards supported include LVDS,
BLVDS, LVPECL, RSDS, differential SSTL and differential HSTL. Tables 2-13 and 2-14 show the I/O standards
(together with their supply and reference voltages) supported by the LatticeECP/EC devices. For further informa-
tion on utilizing the sysIO buffer to support a variety of standards please see the details of additional technical infor-
mation at the end of this data sheet.
Table 2-13. Supported Input Standards
Input Standard
V
REF
(Nom.)
V
CCIO
1
(Nom.)
Single Ended Interfaces
LVTTL
LVCMOS33
2
LVCMOS25
2
LVCMOS18
LVCMOS15
LVCMOS12
2
PCI
HSTL18 Class I, II
HSTL18 Class III
HSTL15 Class I
HSTL15 Class III
SSTL3 Class I, II
SSTL2 Class I, II
SSTL18 Class I
Differential Interfaces
Differential SSTL18 Class I
Differential SSTL2 Class I, II
Differential SSTL3 Class I, II
Differential HSTL15 Class I, III
Differential HSTL18 Class I, II, III
LVDS, LVPECL, BLVDS, RSDS
1. When not speci
fi
ed V
CCIO
can be set anywhere in the valid operating range.
2. JTAG inputs do not have a
fi
xed threshold option and always follow V
CCJ.
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0.9
1.08
0.75
0.9
1.5
1.25
0.9
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1.8
1.5
—
3.3
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相關(guān)PDF資料
PDF描述
LFEC10E-5F256C RS-S_D(Z) Series - Econoline Regulated DC-DC Converters; Input Voltage (Vdc): 48V; Output Voltage (Vdc): 3.3V; Power: 2W; 2:1 and 4:1 Wide Input Voltage Ranges; 1kVDC, 2kVD & 3kVDC Isolation; UL94V-0 Package Material; Continuous Short Circuit Protection; Low Noise; No External Capacitor needed; Efficiency to 83%
LFEC10E-5F256I LatticeECP/EC Family Data Sheet
LFEC20E-3T144C LatticeECP/EC Family Data Sheet
LFEC20E-3T144I LatticeECP/EC Family Data Sheet
LFEC20E-4F256C LatticeECP/EC Family Data Sheet
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LFEC10E-4TN100C 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
LFEC10E-4TN100I 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
LFEC10E-4TN144C 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
LFEC10E-4TN144I 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
LFEC10E-5F256C 功能描述:FPGA - 現(xiàn)場可編程門陣列 10.2K LUTs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
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