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參數(shù)資料
| 型號(hào)： | LF13508D |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 多路復(fù)用及模擬開關(guān) |
| 英文描述： | 8-Channel Analog Multiplexer |
| 中文描述： | 8-CHANNEL, SGL ENDED MULTIPLEXER, CDIP16 |
| 封裝： | DIP-16 |
| 文件頁數(shù)： | 10/16頁 |
| 文件大?。?/td> | 334K |
| 代理商： | LF13508D |
Typical Applications
(Continued)
D. DOUBLING THE SYSTEM CHANNEL CAPABILITY
This is done in two different ways. First, we can use second
level multiplexing with speed benefits, as shown inFigure 9.
A fast 2-channel multiplexer, made by the dual analog
switch AM182, accepts the outputs of each 8-channel MUX,
LF13508, and then feeds them sequentially into an 8-bit
successive approximation A/D converter. With this tech-
nique, the throughput rate of the system can again be made
independent of the LF13508 speed. Looking at the timing
diagram, when the A/D converter converts the analog value
of an upper multiplexer channel, we switch channels in the
lower multiplexer for the next conversion. This can be done
provided that:
T
MUX
s
T
C
a
1 CP
The LF356 connected as unity gain buffers are used be-
cause of the low input impedance of the A/D; they are con-
nected between multiplexers for speed optimization. With a
maximum clock frequency of 4.5 MHz:
Th. R
e
10
6
16
c
2
e
31.25k samples/sec/channel
and
D
V
IN
D
t
max
k
10
256
c
1
2
m
s
e
19.5 mV/
m
s for 10V
FS
An alternate way to increase the system channel is shown
inFigure 10, where the enable pins are used to disable one
MUX while the other is sampling. With this method, many 8-
channel multiplexers can be connected, but the parasitic
capacitance at the common output node will keep increas-
ing and will eventually degrade the settling time, t
s(ON)
.
Also, the MUX speed will now affect the system throughput.
If, for instance, this method was used instead of second
level multiplexing, the system ofFigure 9 will lose half of its
speed. If, however, speed is not the prime system require-
ment, the approach of Figure 10 is more cost effective.
E. DIFFERENTIAL INPUT SYSTEMS
Systems operating in industrial environments may require
an instrumentation amplifier to separate the desired analog
signal
from
any
common-mode
LF11509 was designed to provide 4 pairs of differential in-
put signals to the input of an instrumentation amplifier for
further process.
signal
present.
The
TL/H/5668–15
#
The acquisition time, T
A
, of the Sample and Hold depends upon: R
ON
, I
DSS
of switches, Z
OUT
of switches
#
I
DSS
j
1.5 mA, Z
OUT
e
40 k
X
#
V
IN
e
10V, C
h
e
1000 pF, T
A
e
20
m
s to 0.1%
#
Error created by charge injection during Hold mode:
D
V
E
j
10 pF (14.5V
b
V
IN
)/C
h
FIGURE 8. Inexpensive Sample and Hold
10
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| LF13508M | 8-Channel Analog Multiplexer |
| LF13508N | 8-Channel Analog Multiplexer |
| LF13741 | MONOLITHIC JFET INPUT OPERATIONAL AMPLIFIER |
| LF13741H | MONOLITHIC JFET INPUT OPERATIONAL AMPLIFIER |
| LF13741N | MONOLITHIC JFET INPUT OPERATIONAL AMPLIFIER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LF13508M | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Channel Analog Multiplexer |
| LF13508N | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Channel Analog Multiplexer |
| LF13508N/B+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Channel Analog Multiplexer |
| LF13509 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Channel Analog Multiplexer |
| LF13509D | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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