TL/H/5667
L
L
January 1995
Quad SPST JFET Analog Switches
LF11331, LF13331 4 Normally Open Switches with Disable
LF11332, LF13332 4 Normally Closed Switches with Disable
LF11333, LF13333 2 Normally Closed Switches and 2 Normally Open Switches with Disable
LF11201, LF13201 4 Normally Closed Switches
LF11202, LF13202 4 Normally Open Switches
General Description
These devices are a monolithic combination of bipolar and
JFET technology producing the industry’s first one chip
quad JFET switch. A unique circuit technique is employed to
maintain a constant resistance over the analog voltage
range of
g
10V. The input is designed to operate from mini-
mum TTL levels, and switch operation also ensures a break-
before-make action.
These devices operate from
g
15V supplies and swing a
g
10V analog signal. The JFET switches are designed for
applications where a dc to medium frequency analog signal
needs to be controlled.
Features
Y
Analog signals are not loaded
Y
Constant ‘‘ON’’ resistance for signals up to
g
10V and
100 kHz
Y
Pin compatible with CMOS switches with the advantage
of blow out free handling
Y
Small signal analog signals to 50 MHz
Y
Break-before-make action
t
OFF
k
t
ON
b
50 dB
k
1.0 nA
Y
High open switch isolation at 1.0 MHz
Y
Low leakage in ‘‘OFF’’ state
Y
TTL, DTL, RTL compatibility
Y
Single disable pin opens all switches in package on
LF11331, LF11332, LF11333
Y
LF11201 is pin compatible with DG201
Test Circuit and Schematic Diagram
TL/H/5667–2
FIGURE 1. Typical Circuit for One Switch
TL/H/5667–12
FIGURE 2. Schematic Diagram (Normally Open)
C
1995 National Semiconductor Corporation
RRD-B30M75/Printed in U. S. A.