參數(shù)資料
型號(hào)： LE28DW1621T
廠商： Sanyo Electric Co.,Ltd.
英文描述： 16 Megabit FlashBank Memory
中文描述： 16兆位內(nèi)存FlashBank
文件頁(yè)數(shù)： 1/20頁(yè)
文件大?。?/td> 347K
代理商： LE28DW1621T
16 Megabit FlashBank Memory
LE28DW1621T-80T (Draft3)
Peimnay Specfcaions
1
SANYO Electric Co.,Ltd. Semiconductor Company 1-1-1 Sakata Oizumi Gunma Japan
R.1.20(4/27/2000) No.xxxx-1/20
FEATURES:
Single 3.0-Volt Read and Write Operations
Separate Memory Banks by Address Space
– Bank1: 4Mbit (256K x 16 / 512K x 8) Flash
– Bank2: 12Mbit (768K x 16 / 1536K x 8) Flash
–
Simultaneous Read and Write Capability
Superior Reliability
–
Endurance:
100,000 Cycles (Erase Verify Mode)
10,000 Cycles
–
Data Retention: 10 years
Low Power Consumption
–
Active Current, Read:
–
Active Current, Read & Write: 30 mA (typical)
–
Standby Current:
–
Auto Low Power Mode Current: 5μA (typical)
10 mA (typical)
5μA (typical)
Fast Write Operation
–
Chip Erase + Program:
–
Block Erase + Program:
–
Sector Erase + Program:
Fixed Erase, Program, Write Times
–
Does not change after cycling
15 sec (typical)
500 ms (typical)
30 ms (typical)
Read Access Time
–
80 ns
Latched Address and Data
End of Write Detection
–
Toggle Bit / Data # Polling / RY/BY#
Write Protection by WP# pin
Erase Verify Mode
Flash Bank:
Two Small Erase Element Sizes
–
1K Words per Sector or 32K Words per Block
–
Erase either element before Word Program
CMOS I/O Compatibility
Packages Available
–
48-Pin TSOP (12mm x 20mm)
Continuous
Hardware and Software Data
Protection (SDP)
Product Description
The LE28DW1621T consists of two memory banks, Bank1 is
a 256K x 16 bits or 512K x 8 sector mode flash EEPROM and
Bank2 is a 768K x 16 bits or 1536K x 8 sector mode flash
EEPROM, manufactured with SANYO's proprietary, high per-
formance FlashTechnology. The LE28DW1621T writes with a
3.0-volt-only power supply.
The LE28DW1621T is divided into two separate memory banks.
Bank1 contains 256 sectors of 1K words or 8 blocks of 32K
words, Bank2 contains 768 sectors of 1K words or 24 blocks of
32K words.
Any bank may be used for executing code while writing data to
a different bank. Each memory bank is controlled by separate
Bank selection address (A18,A19) lines.
The LE28DW1621T inherently uses less energy during Erase,
and Program than alternative flash technologies. The total
energy consumed is a function of the applied voltage, current,
and time of application. Since for any given voltage range, the
Flash technology uses less current to program and has a shorter
Erase time, the total energy consumed during any Erase or
Program operation is less than alternative flash technologies.
The Auto Low Power mode automatically reduces the active
read current to approximately the same as standby; thus,
providing an average read current of approximately 1 mA/MHz of
Read cycle time.
The Flash technology provides fixed Erase and Program times,
independent of the number of erase/program cycles that have
occurred. Therefore the system software or hardware does not
have to be modified or derated as is necessary with alternative
flash technologies, whose Erase and Program times increase
with accumulated erase/program cycles.
Device Operation
The LE28DW1621T operates as independent 4Megabit and
12Megabit Word Pogram, Sector Erase flash EEPROMs. Two
memory Banks are spareted by the address space.
The Bank1 is assigned as C0000h to FFFFFh, Bank2 is as-
signed as 00000h to BFFFFh.
All memory banks share common I/O lines, WE#, and OE#.
Memory bank selection is by bank select address(A19, A18).
WE# is used with SDP to control the Erase and Program
operation in each memory bank.
The LE28DW1621T provides the added functionality of being
able to simultaneously read from one memory bank while
erasing, or programming to one other memory bank. Once the
internally controlled Erase or Program cycle in a memory bank
has commenced, a different memory bank can be accessed for
read. Also, once WE# and CE# are high during the SDP load
sequence, a different bank may be accessed to read.
LE28DW1621T which selectes banks (A19, A18) by a address.
It can be used as a normal conventinal flash memory when
operats erase or program operation to only a bank at non-
concurrent operation.
The device ID cannot be accessed while any bank is writing,
erasing, or programming.
The Flash Bank product family was jointly developed by SANYO and Sillicon Storage Technology,Inc.(SST),under SST's technology license. This preliminary specification is subject to change
without notic
e.
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