參數(shù)資料
型號: LC89052TA-E
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PDSO24
封裝: 0.225 INCH, TSSOP-24
文件頁數(shù): 9/42頁
文件大小: 224K
代理商: LC89052TA-E
LC89052TA-E
No.7457-17/42
8.4.3 Output data formats: normal mode (DATAO)
The output format of after-demodulation audio data must be set with OFSEL[2:0].
In the format shown below, the input data only within the audio data range is output.
BCK, LRCK, and DATAO are output in synchronization with the rising edge of CKOUT. DATAO is output in
synchronization with the falling edge of BCK.
Generation of output data starts at the LRCK edge immediately after the ERROR output turns low.
The low level is output all the time except for the effective bit length of output data.
Figure 8.6 Data Output Timing (Normal Mode)
LRCK
BCK
DATAO
LRCK
BCK
DATAO
LRCK
BCK
DATAO
LSB
MSB
16, 20, 24 bits
L-ch
R-ch
LSB
MSB
LSB
MSB
L-ch
R-ch
LSB
MSB
16 to 24 bits
LSB
MSB
L-ch
R-ch
LSB
MSB
(0) : MSB first left-justified data output (OFSEL[2 : 0]=000)
(1) : I
2S data output (OFSEL[2 : 0]=001)
(2) : MSB first right-justified data output (OFSEL[2 : 0]=010, 011 or 100)
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