參數(shù)資料
型號： LC87F5164A
廠商： Sanyo Electric Co.,Ltd.
英文描述： 8-Bit Single Chip Microcontroller with 64KB(65535 ×8 bits) FEPROM and 1024 Byte(1024 ×8 bits) RAM On Chip(8位單片微控制器（帶片上64K（65535 ×8 bit）字節(jié)閃速EPROM和1024(1024 ×8 bits)字節(jié)RAM）)
中文描述： 8位單片機微控制器的64KB（65535 × 8位）FEPROM和1024字節(jié)（1024 × 8位）片上的RAM（8位單片微控制器（帶片上64K的（65535 × 8位）字節(jié)閃速存儲器和1024（1024 × 8位）字節(jié)的RAM））
文件頁數(shù)： 12/28頁
文件大小： 787K
代理商： LC87F5164A
LC87F5164A
12/28
Port Output Configuration
Output configuration and pull-up resistor options are shown in the following table.
Input is possible even when port is set to output mode.
Option
applies to:
1
P00-P07
1 bit units
2
1
P10-P17
P20-P27
P30-P34
1
PA0-PA5
PB0-PB7(*)
PC0-PC7
P70
-
None
P71-P73
-
None
P80-P87
-
None
SI2P0,
SI2P2
SI2P3
PWM0,
PWM1
SI2P1
-
None
Terminal
Option
Output Format
Pull-up resistor
CMOS
Nch-open drain
CMOS
Nch-open drain
Programmable (Note 1)
None
Programmable
Programmable
each bit
2
CMOS
Nch-open drain
Programmable
Programmable
each bit
2
Nch-open drain
CMOS
Nch-open drain
CMOS
Programmable
Programmable
None
None
-
None
CMOS (When used as standard port)
Nch-open drain (When used for SIO2 data)
Input only
Output for 32.768kHz crystal oscillation
None
XT1
XT2
Note 1 Programmable pull-up resisters of Port 0 can be attatched in nibble units (P00-03, P04-07).
(*) When in parallel interface mode, PB0-PB7 output format is CMOS, regardless of any selected option.
Note: Connect as follows to reduce noise on VDD and increase the back-up time.
VSS1, VSS2 and VSS3 must be connected together and grounded.
Example 1 : In hold mode, during backup, port output ‘H’ level is supplied from the back-up capacitor.
Example 2 : During backup in hold mode output is not held high and its value in unsettled.
-
-
None
None
None
None
Power
Supply
Back-up capacitor
LSI
VDD1
VDD2
VSS1
VSS2
VSS3
VDD3
Power
Supply
Back-up capacitor
LSI
VDD1
VDD2
VSS1
VSS2
VSS3
VDD3
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