參數(shù)資料
型號: LC876748A
廠商: Sanyo Electric Co.,Ltd.
元件分類: 8位微控制器
英文描述: 8-Bit Single Chip Microcontroller
中文描述: 8位單片機(jī)微控制器
文件頁數(shù): 4/26頁
文件大?。?/td> 1099K
代理商: LC876748A
LC876764A/48A
4/26
(14) Interrupts: 21-source, 10-vectored interrupts
1) Three priority (low, high and highest) multiple interrupts are supported. During interrupt handling,
an equal or lower priority interrupt request is refused.
2) If interrupt requests to two or more vector addresses occur at once, the higher priority interrupt takes
precedence. In the case of equal priority levels, the vector with the lowest address takes
precedence.
No.
Vector
Selectable Level
1
00003H
X or L
INT0
2
0000BH
X or L
INT1
3
00013H
H or L
INT2/ T0L/ INT4
4
0001BH
H or L
INT3/ Base timer/ INT5
5
00023H
H or L
T0H
6
0002BH
H or L
T1L/ T1H
7
00033H
H or L
SI00
8
0003BH
H or L
SI01
9
00043H
H or L
ADC/ MIC/ T6/ T7
10
0004BH
H or L
VFD automatic display controller/ Port0/ T4/ T5
z
Priority Level: X>H>L
z
For equal priority levels, vector with lowest address takes precedence.
(15) Subroutine stack levels: 768 levels max. Stack is located in RAM.
(16) Multiplication and division
- 16 bit × 8 bit (executed in 5 cycles)
- 24 bit × 16 bit (12 cycles)
- 16 bit ÷ 8 bit (8 cycles)
- 24 bit ÷ 16 bit (12 cycles)
(17) Oscillation circuits
- On-chip RC oscillation circuit for system clock use.
- On-chip CF oscillation circuit for system clock use. (R
f
built in)
- On-chip Crystal oscillation circuit low speed system clock use. (Rd, R
f
external)
- On-chip frequency -variable RC oscillation circuit for system clock use
(18) System clock divider function
- Able to reduce current consumption
Available minimum instruction cycle time: 300ns, 600ns, 1.2μs, 2.4
μ
s, 4.8μs, 9.6μs, 19.2μs,
38.4μs, 76.8μs. (Using 10MHz main clock)
(19) Standby function
- HALT mode
HALT mode is used to reduce power consumption. Program execution is stopped. Peripheral
circuits still operate but VFD display and some serial transfer operations stop.
1) Oscillation circuits are not stopped automatically.
2) Release occurs on system reset or by interrupt.
Interrupt signal
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