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參數(shù)資料
| 型號(hào)： | LC8766C8A |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-Bit Single Chip Microcontroller |
| 中文描述： | 8位單片機(jī)微控制器 |
| 文件頁數(shù)： | 3/23頁 |
| 文件大?。?/td> | 681K |
| 代理商： | LC8766C8A |
LC8766C8A/B2A/96A
No.6718-3/23
- Base Timer
1) The clock signal can be selected from any of the following :
Sub-clock (32.768kHz crystal oscillator), system clock, and prescaler output from timer 0
2) Interrupts can be selected to occur at one of five different times.
(9) High speed clock counter
1) Capable of counting maximum: 20MHz clock (Using main clock 10MHz)
2) Real time output
(10) Serial-interface
- SIO 0: 8 bit synchronous serial Interface
1) LSB first / MSB first function available
2) Internal 8 bit baud-rate generator (maximum transmit clock period 4 / 3 Tcyc)
3) Continuous automatic data communication (1-256 bits)
- SIO 1: 8 bit asynchronous / synchronous serial interface
Mode 0: Synchronous 8 bit serial IO (2-wire or 3-wire, transmit clock 2–512 Tcyc)
Mode 1: Asynchronous serial IO (half duplex, 8 data bits, 1 stop bit, baud rate 8–2048Tcyc)
Mode 2: Bus mode 1 (start bit, 8 data bits, transmit clock 2–512 Tcyc)
Mode 3: Bus mode 2 (start detection, 8 data bits, stop detection)
(11) AD converter
-8 bits
×
12 channels
(12) Remote control receiver circuit (connected to P73 / INT3 / T0IN terminal)
-Noise rejection function (noise rejection filter time constant can selected from 1 / 32 / 128 Tcyc)
(13) Watchdog timer
- The watching timer period is set using an external RC.
- Watchdog timer can produce interrupt, system reset
(14) Interrupts: 15-source, 10-vectored interrupts
1) Three priority (low, high and highest) multiple interrupts are supported. During interrupt handling, an equal or
lower priority interrupt request is refused.
2) If interrupt requests to two or more vector addresses occur at once, the higher priority interrupt takes precedence.
In the case of equal priority levels, the vector with the lowest address takes precedence.
(15) Subroutine stack levels: 2048 levels max. Stack is located in RAM.
(16) Multiplication and division
- 16 bit
×
8 bit (executed in 5 cycles)
- 24 bit
×
16 bit (12 cycles)
- 16 bit ÷ 8 bit (8 cycles)
- 24 bit ÷ 16 bit (12 cycles)
(17) Oscillation circuits
- On-chip RC oscillation circuit for system clock use.
- On-chip CF oscillation circuit for system clock use. (R
f
built in)
- On-chip Crystal oscillation circuit low speed system clock use. (Rd, R
f
external)
(18) System clock divider function
- Able to reduce current consumption
Available minimum instruction cycle time: 300ns, 600ns, 1.2
μ
s, 4.8
μ
s, 9.6
μ
s, 19.2
μ
s, 38.4
μ
s, 76.8
μ
s.
(Using 10MHz main clock)
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