參數(shù)資料
型號(hào)： LC8766C8A
廠(chǎng)商： Sanyo Electric Co.,Ltd.
元件分類(lèi)： 8位微控制器
英文描述： 8-Bit Single Chip Microcontroller
中文描述： 8位單片機(jī)微控制器
文件頁(yè)數(shù)： 15/23頁(yè)
文件大?。?/td> 681K
代理商： LC8766C8A
LC8766C8A/B2A/96A
No.6718-15/23
4. Serial Input/Output Characteristics at Ta=-30
°
C to +70
°
C, VSS1=VSS2=0V
Ratings
typ.
Parameter
Symbol
Pins
Conditions
VDD[V]
4.5–6.0
min.
4/3
max.
unit
Cycle Time
Low Level
pulse width
tSCK(1)
tSCKL(1)
tSCKLA(1)
tSCKH(1)
tSCKHA(1)
tSCK(2)
tSCKL(2)
tSCKH(2)
tSCK(3)
tSCKL(3)
tSCKLA(2)
tSCKH(3)
tSCKHA(2)
tSCK(4)
tSCKL(4)
tSCKH(4)
t
sDI
2/3
2/3
2/3
High Level
pulse width
SCK0(P12) Refer to figure 6
3
Cycle Time
Low Level
pulse width
High Level
pulse width
Cycle Time
Low Level
pulse width
2
1
1
I
SCK1(P15) Refer to figure 6
4.5–6.0
4/3
t
CYC
1/2
3/4
1/2
High Level
pulse width
SCK0(P12) CMOS output option
Refer to figure 6
4.5–6.0
2
tSCK
Cycle Time
Low Level
pulse width
High Level
pulse width
2
tCYC
1/2
S
O
SCK1(P15) CMOS output option
Refer to figure 6
4.5–6.0
1/2
tSCK
Data set-up time
0.03
S
Data hold time
t
hDI
SI0(P11),
SI1(P14),
SB0(P11),
SB1(P14)
Measured with respect
to SI0CLK leading
edge.
Refer to figure 6
4.5–6.0
0.03
S
Output delay time
tdDO
SO0(P10),
SO1(P13),
SB0(011),
SB1(P14)
Measured with respect
to SI0CLK trailing
edge.
When port is open
drain: Time delay
from SI0CLK trailing
edge to the SO data
change.
Refer to figure 6
4.5–6.0
1/3
tCYC
+0.05
μ
s
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