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參數(shù)資料
| 型號： | LC876564A |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | 8-Bit Single Chip Microcontroller with 72/64 KB ROM and 2048-Byte RAM On Chip |
| 中文描述： | 8位單片機微控制器六十四分之七十二KB ROM和2048字節(jié)的片上內(nèi)存 |
| 文件頁數(shù)： | 9/23頁 |
| 文件大小： | 681K |
| 代理商： | LC876564A |
LC876572A/64A
No.6716-9/23
Port Output Configuration
Output configuration and pull-up/pull-down resistor options are shown in the following table.
Input /output is possible even when port is set to output mode.
Terminal
Option applies to: Options
Output Format
Pull-up resistor
Pull-down
resistor
-
1
CMOS
Programmable
(Note 1)
None
P00 to P07
1 bit units
2
15 voltage Nch-open drain
-
1
CMOS
Programmable
-
P10 to P17
each bit
2
Nch-open drain
Programmable
-
1
CMOS
Programmable
-
P30 to P37
each bit
2
15V Nch-open drain
None
-
P70
-
None
Nch-open drain
Programmable
-
P71 to P73
-
None
CMOS
Programmable
-
P80 to P87
-
None
Nch-open drain
None
-
1
High voltage Pch-open drain
-
Fixed
S0/T0 to S6/T6
each bit
2
High voltage Pch-open drain
-
None
S7/T7 to S15/T15
S16 to S31
S32 to S47
-
None
High voltage Pch-open drain
-
fixed
1
High voltage Pch-open drain
-
Fixed
each bit
2
High voltage Pch-open drain
-
None
S48 to S51
-
None
High voltage Pch-open drain
-
None
XT1
-
None
Input only
None
-
XT2
-
None
Output for 32.768kHz crystal
oscillation
None
-
Note 1 Programmable pull-up resisters of Port 0 can be attatched in nibble units (P00-03, P04-07).
* Note 1: Connect as follows to reduce noise on VDD and increase the back-up time.
VSS1, and VSS2 must be connected together and grounded.
*Note 2 : The power supply for the internal memory is VDD1 but it uses the VDD2 as the power supply for ports. When the
VDD2 is not backed up, the port level does not become “H” even if the port latch is in the “H” level. Therefore,
when the VDD2 is not backed up and the port latch is “H” level, the port level is unstable in the HOLD mode, and
the back up time becomes shorter because the through current runs from VDD to GND in the input buffer.
If VDD2 is not backed up, output “L” by the program or pull the port to “L” by the external circuit in the HOLD
mode so that the port level becomes “L” level and unnecessary current consumption is prevented.
LSI
VDD1
Back-up capacitors *2
VDD2
VDD3
VSS2
VSS1
VDD4
Power
VFD
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