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參數(shù)資料
| 型號： | LC876564A |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | 8-Bit Single Chip Microcontroller with 72/64 KB ROM and 2048-Byte RAM On Chip |
| 中文描述： | 8位單片機(jī)微控制器六十四分之七十二KB ROM和2048字節(jié)的片上內(nèi)存 |
| 文件頁數(shù)： | 3/23頁 |
| 文件大?。?/td> | 681K |
| 代理商： | LC876564A |
LC876572A/64A
No.6716-3/23
(9) Serial-interface
- SIO 0: 8 bit synchronous serial Interface
1) LSB first / MSB first function available
2) Internal 8 bit baud-rate generator (maximum transmit clock period 4 / 3 Tcyc)
3) Continuous automatic data communication (1-256 bits)
- SIO 1: 8 bit asynchronous / synchronous serial interface
Mode 0: Synchronous 8 bit serial IO (2-wire or 3-wire, transmit clock 2–512 Tcyc)
Mode 1: Asynchronous serial IO (half duplex, 8 data bits, 1 stop bit, baud rate 8–2048Tcyc)
Mode 2: Bus mode 1 (start bit, 8 data bits, transmit clock 2–512 Tcyc)
Mode 3: Bus mode 2 (start detection, 8 data bits, stop detection)
(10) AD converter
-8 bits
×
12 channels
(11) Remote control receiver circuit (connected to P73 / INT3 / T0IN terminal)
-Noise rejection function (noise rejection filter time constant can selected from 1 / 32 / 128 Tcyc)
(12) Watchdog timer
- The watching timer period is set using an external RC.
- Watchdog timer can produce interrupt, system reset
(13) Interrupts: 15-source, 10-vectored interrupts
1) Three priority (low, high and highest) multiple interrupts are supported. During interrupt handling, an equal or
lower priority interrupt request is refused.
2) If interrupt requests to two or more vector addresses occur at once, the higher priority interrupt takes precedence.
In the case of equal priority levels, the vector with the lowest address takes precedence.
(14) Subroutine stack levels: 1024 levels max. Stack is located in RAM.
(15) Multiplication and division
- 16 bit
×
8 bit (executed in 5 cycles)
- 24 bit
×
16 bit (12 cycles)
- 16 bit ÷ 8 bit (8 cycles)
- 24 bit ÷ 16 bit (12 cycles)
(16) Oscillation circuits
- On-chip RC oscillation circuit for system clock use.
- On-chip CF oscillation circuit for system clock use. (R
f
built in)
- On-chip Crystal oscillation circuit low speed system clock use. (Rd, R
f
external)
(17) Standby function
- HALT mode
HALT mode is used to reduce power consumption. Program execution is stopped. Peripheral circuits still
operate but VFD display and some serial transfer operations stop.
1) Oscillation circuits are not stopped automatically.
2) Release occurs on system reset or by interrupt.
-HOLD mode
HOLD mode is used to reduce power consumption. Both program execution and peripheral circuits are
stopped.
1) CF, RCand crystal oscillation circuits stop automatically.
2) Release occurs on any of the following conditions.
(1) input to the reset pin goes low
(2) a specified level is input at least one of INT0, INT1, INT2
(3) an interrupt condition arises at port 0
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