參數(shù)資料
型號(hào): LC875064B
廠商: Sanyo Electric Co.,Ltd.
英文描述: 8-Bit Single Chip Microcontroller with 64K-Byte(65535 ×8 bits) EPROM and 2048-Byte(2048 ×8 bits) RAM On Chip(8位單片微控制器(帶片上64K(65535 ×8 bit)字節(jié)EPROM和2048(2048 ×8 bits)字節(jié)RAM))
中文描述: 8位單片機(jī)微控制器64K的字節(jié)(65535 × 8位)存儲(chǔ)器和2048字節(jié)(2048 × 8位)片上的RAM(8位單片微控制器(帶片上64K的(65535 × 8位)字節(jié)存儲(chǔ)器和2048(2048 × 8位)字節(jié)的RAM))
文件頁(yè)數(shù): 10/26頁(yè)
文件大小: 762K
代理商: LC875064B
LC875064B/56B/48B
10/26
Port Output Configuration
Output configuration and pull-up resistor options are shown in the following table.
Input is possible even when port is set to output mode.
Option
applies to:
1
P00-P07
1 bit units
2
1
P10-P17
P20-P27
2
1
PA2-PA5
PB0-PB7(*)
PC0-PC7
P70
-
None
P71-P73
-
None
P80-P82
-
None
PWM0,
PWM1
XT1
-
None
XT2
-
None
Note 1 Programmable pull-up resisters of Port 0 can be attatched in nibble units (P00-03, P04-07).
(*) When in parallel interface mode, PB0-PB7 output format is CMOS, regardless of any selected option.
Note: Connect as follows to reduce noise on VDD and increase the back-up time.
VSS1, VSS2 and VSS3 must be connected together and grounded.
Example 1 : In hold mode, during backup, port output ‘H’ level is supplied from the back-up capacitor.
Example 2 : During backup in hold mode output is not held high and its value in unsettled.
Terminal
Option
Output Format
Pull-up resistor
CMOS
Nch-open drain
CMOS
Nch-open drain
CMOS
Nch-open drain
Programmable (Note 1)
None
Programmable
Programmable
Programmable
Programmable
each bit
each bit
2
Nch-open drain
CMOS
Nch-open drain
CMOS
Programmable
Programmable
None
None
-
None
Input only
Output for 32.768kHz crystal oscillation
None
None
Power
LSI
VDD1
VDD2
VDD3
VSS1
VSS2
VSS3
Back-up capacitor
LSI
VDD1
VDD2
VDD3
VSS1
VSS2
VSS3
Power
Back-up capacitor
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