參數(shù)資料
型號(hào): LC72700E
廠商: Sanyo Electric Co.,Ltd.
英文描述: Mobile FM Multiplex Broadcast Receiver LSI(移動(dòng)FM多路廣播接收器)
中文描述: 多重移動(dòng)調(diào)頻廣播接收機(jī)的LSI(移動(dòng)調(diào)頻多路廣播接收器)
文件頁(yè)數(shù): 9/14頁(yè)
文件大小: 200K
代理商: LC72700E
4. Control Data Timing in Parallel Mode
Handling Pins for the Unused Mode when the CPU Interface is Specified
1. When Serial Mode is Specified
2. When Parallel Mode is Specified
Note:
**
1. The data values shown above are for the state immediately following a reset operation.
2. The INT-R pin (pin 35) signal is always output regardless of the mode.
3. Since the S/P pin (pin 42) has a built-in pull-up resistor, serial mode will be selected if it is left open.
No. 4870-9/14
LC72700E, LC72700G
PORT2
PORT1
PORT0
Item
Set data
Default value
0
0
0
Allowed error count
Upper 4 bits
Back allowed errors
2
Lower 4 bits
Forward allowed errors
2
0
0
1
Block error protection
count
Upper 4 bits
Back protection count
1
Lower 4 bits
Forward protection count
7
0
1
0
Frame error protection
count
Upper 4 bits
Back protection count
1
Lower 4 bits
Forward protection count
7
0
1
1
Error correction initial
threshold value
Upper 4 bits
Lower 3 bits
Initial threshold value
7
1
0
0
Readout block no.
0 to 189 (8 bits)
0
Pin
Pin No.
(37)
(38 to 40)
Pin state
Handling
PST
PORT0 to 2
Pull-up resistor input
Pull-up resistor input
Leave open or connect to the power-supply (V
DD
)
Leave open or connect to the power-supply (V
DD
)
Leave open
Leave open
Leave open
DATA0 to 7
RDY
RDY0
(13 to 20)
(26)
(27)
Output direction (fixed at the low level)
Fixed at a high-level output
Fixed at a high-level output
RE
(25)
Pull-up resistor input
Leave open or connect to the power-supply (V
DD
)
Pin
Pin No.
(29)
(30)
Pin state
Handling
CL
CE
Input pin
Input pin
Connect to the power supply or ground
Connect to the power supply or ground
DI
(31)
Input pin
Connect to the power supply or ground
DO
(32)
Open-drain output in the off state
Connect to ground
Register set
Input data
DAT0 to 7
Output
Output
PORT0 to 2
PST
<Input direction>
t
ps
300 ns
DAT pin I/O
direction
500 to 800 ns
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