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參數(shù)資料
| 型號： | LC72349W |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | Low-Voltage ETR Controller with On-Chip LCD Driver |
| 中文描述： | 低電壓東突控制器的片上LCD驅(qū)動器 |
| 文件頁數(shù)： | 7/14頁 |
| 文件大?。?/td> | 119K |
| 代理商： | LC72349W |
No. 6472-7/14
LC72348G/W, 72349G/W
Pin Functions
Pin No.
Pin
I/O
Function
I/O circuit
75 kHz oscillator connections
64
1
XIN
XOUT
I
O
IC testing. These pins must be connected to ground during normal operation.
—
63
2
TEST1
TEST2
I
I
Special-purpose key return signal input ports designed with a low threshold voltage.
When used in conjunction with port PB to form a key matrix, up to 3 simultaneous key
presses can be detected. The four pull-down resistors are selected together in a
single operation using the IOS instruction (PWn = 2, b1); they cannot be specified
individually. Input is disabled in backup mode, and the pull-down resistors are
disabled after a reset.
6
5
4
3
PA0
PA1
PA2
PA3
I
General-purpose CMOS and n-channel open-drain output shared-function ports.
The IOS instruction (Pwn = 2) is used for function switching.
(b0: PB0, b2: PB1, b3: PB2, PB3) (0: general-purpose CMOS, 1: n-channel open-
drain)
Special-purpose key source signal output ports. Since unbalanced CMOS output
transistor circuits are used, diodes to prevent short-circuits when multiple keys are
pressed are not required. These ports go to the output high-impedance state in
backup mode. These ports go to the output high-impedance state after a reset and
remain in that state until an output instruction (OUT, SPB, or RPB) is executed.
*
: Verify the output impedance conditions carefully if these pins are used for functions
other than key source outputs.
10
9
8
7
PB0
PB1
PB2
PB3
O
General-purpose I/O ports.
PD0 can be used as an external interrupt port. Input or output mode can be set
individually using the IOS instruction by the bit (Pwn = 4, 5). A value of 0 specifies
input, and 1 specifies output. These ports go to the input disabled high-impedance
state in backup mode. They are set to function as general-purpose input ports after a
reset.
14
13
12
11
18
17
16
15
PC0
PC1
PC2
PC3
INT/PD0
PD1
PD2
PD3
*
2
I/O
General-purpose output ports with shared beep tone output function (PE0 only). The
BEEP instruction is used to switch PE0 between the general-purpose output port and
beep tone output functions. To use PE0 as a general-purpose output port, execute a
BEEP instruction with b2 set to 0. Set b2 to 1 to use PE0 as the beep tone output
port. The b0 and b1 bits are used to select the beep tone frequency. There are two
beep tone frequencies supported.
*
: When PE0 is set up as the beep tone output, executing an output instruction to PE0
only changes the state of the internal output latch, it does not affect the beep tone
output in any way. Only the PE0 pin can be switched between the general-purpose
output function and the beep tone output function; the PE1 pin only functions as a
general-purpose output. These pins go to the high-impedance state in backup
mode and remain in that state until an output instruction or a BEEP instruction is
executed. Since these ports are open-drain ports, resistors must be inserted
between these pins and V
DD
. These ports are set to general-purpose output port
function after a reset.
20
19
BEEP/PE0
PE1
Input with built-in
pull-down resistor
Unbalanced CMOS push-
pull/n-channel open-drain
N-channel open-drain
CMOS push-pull
Continued on next page.
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