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參數(shù)資料
| 型號(hào)： | LC7218M |
| 元件分類(lèi)： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 40 MHz, PDSO24 |
| 封裝： | MFP-24 |
| 文件頁(yè)數(shù)： | 6/16頁(yè) |
| 文件大?。?/td> | 282K |
| 代理商： | LC7218M |
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2. When the general-purpose counter is used the DO pin can be used to check for completion of the general-purpose
counter measurement.
When CTEN is set to 1, DO going low due to changes in IN0 is disabled and DO is set high automatically.
DO is automatically set low when the general-purpose counter measurement completes.
(That is, DO can be used to check for measurement completion.)
PLL Unlock Data Read Out Procedure
The internal data UL(n) is set on the rising edge of ERROR
and reset on the rising edge of CE
.
The ERROR data UL(n) from before the previous CE
rising edge can be read out in mode 3 (data output).
In the example above, the data from the period between t0 and t1 is read out.
No. 4758-14/16
LC7218, 7218M, 7218JM
UL (n)
3210
ERROR < 0.55 s →
0000
0.55 s ≤ ERROR < 1.11 s →
1000
1.11 s ≤ ERROR < 2.22 s →
1001
2.22 s ≤ ERROR < 3.33 s →
1011
3.33 s ≤ ERROR
→
1111
UL0 : 1.11 s
UL1 : 2.22 s
UL2 : 3.33 s
UL3 : 0.55 s
Each bit is set to 1 according to ERROR as described above.
ERROR: the phase difference (for a 7.2 MHz crystal)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LC7218M-TLM-E | 制造商:Sony Semiconductor Solutions Division 功能描述: |
| LC7219 | 制造商:SANYO 制造商全稱(chēng):Sanyo Semicon Device 功能描述:PLL Frequency Synthesizers |
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| LC72191JM | 制造商:SANYO 制造商全稱(chēng):Sanyo Semicon Device 功能描述:PLL Frequency Synthesizer for Electronic Tuning in Car Stereo Tuners |
| LC72191JMA-AH | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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