參數(shù)資料
型號(hào): LC72146
廠商: Sanyo Electric Co.,Ltd.
英文描述: PLL Frequency Synthesizer for Electronic Tuning(用于電子調(diào)諧的鎖相環(huán)頻率合成器)
中文描述: 鎖相環(huán)頻率合成器電子調(diào)諧(用于電子調(diào)諧的鎖相環(huán)頻率合成器)
文件頁數(shù): 12/21頁
文件大?。?/td> 356K
代理商: LC72146
Serial Data Output
The 40-bit data word output on DO has the format and functions as shown in Figure 5 and Table 12, respectively.
Figure 5 Output Data Word Out
Table 12 Input Data Functions
Serial Data Input/Output Mode Selection
The LC72146/M use the CCB (computer control bus) serial data format. The first eight bits form the address, shown in
Figure 6, used to select the mode of operation as shown in Table 13.
Table 13 Serial Data Input/Output Mode Selection
No. 4922-12/21
LC72146, 72146M
No.
Name
Function
Related bits
Input port data
Bits I-1 to I-7 reflect the data latched into each input port when the device changes to data output mode.
I6 and I7 are zero when the corresponding port is a counter input. I1 to I5 correspond to the I/O1 to I/O5
ports, and I6 and I7, to the HCTR/I6 and LCTR/I7 inputs, respectively.
Counter contents
Bits C0 to C19 are the latched contents of the 20-bit binary counter. C19 is the msb. C0 is the lsb.
(1)
I1 to I7
(2)
C0 to C19
I/O-1 to I/O-5, H/I-6,
L/I-7
OUT1 to OUT5
CTS0, CTS1, CTE
Input/output mode
Address
Function
B0
B1
B2
B3
A0
A1
A2
A3
IN1
0
0
0
1
0
0
1
0
32-bit control data input
IN2
1
0
0
1
0
0
1
0
32-bit control data input
OUT
0
1
0
1
0
0
1
0
Output data. Data is output if the clock is active.
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