參數(shù)資料
型號: LC72144M
廠商: Sanyo Electric Co.,Ltd.
英文描述: PLL Frequency Synthesizer(鎖相環(huán)頻率合成器)
中文描述: 鎖相環(huán)頻率合成器(鎖相環(huán)頻率合成器)
文件頁數(shù): 19/22頁
文件大?。?/td> 308K
代理商: LC72144M
Charge Pump
When unlock is detected following a channel change, PDS (the sub-charge pump) operates. The value of R1 changes to
R1M // R1S (R1S
100
), as shown in following figure, decreasing the low-pass filter time-constant and accelerating
PLL locking.
The unlock detection data UL1 must be set to 1. The unlock detection range will be set to ±0.5 μs or ±1 μs. If a phase
difference in excess of these values is detected the circuit will go to the unlock state and the sub-charge pump will
operate. When the circuit approaches the lock state and the phase difference falls under the unlock detection range, the
sub-charge pump operation will stop, i.e., the sub-charge pump will go to the high impedance state.
No. 5377-19/22
LC72144M
PDC1
PDC0
PDS (sub-charge pump state)
0
High impedance
1
0
Charge pump operates (when unlocked)
1
1
Charge pump operates (normal operation)
DLC
PD1, PD0, PDS
0
Normal operation
1
Forced to low
Pins DO and I/O-5
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