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參數(shù)資料
| 型號(hào)： | LC72144M |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | PLL Frequency Synthesizer(鎖相環(huán)頻率合成器) |
| 中文描述： | 鎖相環(huán)頻率合成器（鎖相環(huán)頻率合成器） |
| 文件頁數(shù)： | 11/22頁 |
| 文件大?。?/td> | 308K |
| 代理商： | LC72144M |
Continued from preceding page.
No. 5377-11/22
LC72144M
No.
Control section/
data
Function
Related data
Control data for
the DO and
I/O-5 pins
ULD, DT0,
DT1, IL0, IL1
A/D converter
control data
ADS, ADI0,
ADI1
(4)
(5)
OUT5
I/O-1, I/O-2, I/O-5
Data that determines the DO and I/O-5 pin outputs
Note: end-AD: A/D converter conversion completion
end-UC: General-purpose counter conversion completion
Note: 1.
Note: 2.
However, this pin becomes open if the I/O-1 and I/O-2 pins are specified to be output ports.
Note:
2. Invalid if the I/O-5 pin is specified to be an input port.
Note: Cannot be used when the crystal oscillator is stopped. (The DO pin will not change state.)
(Reference divider: When R3 = R2 = R1 = 1, and R0 = 0)
A/D converter conversion start data
ADS = 1: Resets and starts the A/D converter
= 0: Resets the A/D converter
If ADC0 and ADC1 are specified for AD input at the same time, conversions are performed in the order
ADC0 first, then ADC1.
See the item on the structure of the A/D converter for details.
ULD
DT1
DT0
DO
I/O-5
0
0
0
Low when unlocked
0
0
1
end-AD
OUT5 flag
*
2
0
1
0
end-UC
IN
*
1
0
1
1
1
0
0
Open
1
0
1
end-AD
Low when unlocked
*
2
1
1
0
end-UC
IN
*
1
1
1
1
ADI1
ADI0
AD input pin
1
1
Stopped
1
0
ADC0
0
1
ADC1
0
0
ADC0, ADC1
Continued on next page.
IL1
IL0
IN state
0
0
Open
0
1
I-1 (pin state)
1
0
I-2 (pin state)
1
1
DO goes low when I-1 changes.
Start
CE: High
Finish
(I-1 charge)
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