VCCO" />
參數(shù)資料
型號: LC5256MV-5FN256I
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 24/99頁
文件大小: 0K
描述: IC CPLD 256MACROCELLS 256FPBGA
標準包裝: 90
系列: ispXPLD® 5000MV
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1): 5.0ns
電壓電源 - 內(nèi)部: 3 V ~ 3.6 V
邏輯元件/邏輯塊數(shù)目: 8
宏單元數(shù): 256
輸入/輸出數(shù): 141
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 256-BGA
供應商設備封裝: 256-FPBGA(17x17)
包裝: 托盤
Lattice Semiconductor
ispXPLD 5000MX Family Data Sheet
26
sysIO Recommended Operating Conditions
Standard
VCCO (V)
2
VREF (V)
Min.
Typ.
Max.
Min.
Typ.
Max.
LVCMOS 3.3
3.0
3.3
3.6
LVCMOS 2.5
2.3
2.5
2.7
LVCMOS 1.8
1
1.65
1.8
1.95
LVTTL
3.0
3.3
3.6
PCI 3.3
3.0
3.3
3.6
AGP-1X
3.15
3.3
3.45
SSTL 2
2.3
2.5
2.7
1.15
1.25
1.35
SSTL 3
3.0
3.3
3.6
1.3
1.5
1.7
CTT 3.3
3.0
3.3
3.6
1.35
1.5
1.65
CTT 2.5
2.3
2.5
2.7
1.35
1.5
1.65
HSTL Class I
1.4
1.5
1.6
0.68
0.75
0.9
HSTL Class III
1.4
1.5
1.6
0.9
HSTL Class IV
1.4
1.5
1.6
0.9
GTL+
1.4
3.6
0.882
1.0
1.122
LVDS
2.3
2.5/3.3
3.6
1. Design tools default setting.
2. Inputs are independent of VCCO setting. However, VCCO must be set within the valid operating range for one of the supported standards.
SELECT
DEVICES
DISCONTINUED
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