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參數(shù)資料
| 型號(hào)： | LC321664AM |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | 1 MEG (65536 words X 16 bits) DRAM Fast Page Mode, Byte Write |
| 中文描述： | 1邁可（65536字× 16位），內(nèi)存快速頁面模式，字節(jié)寫 |
| 文件頁數(shù)： | 7/30頁 |
| 文件大?。?/td> | 964K |
| 代理商： | LC321664AM |
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LC321664AJ, AM, AT-80
No. 4795-7/30
Notes:
6)
After the power is turned on, 200 μs are required after the arrival of V
CC
stabilized current before
memory is initialized and begins operation. In addition, before memory operation initializes,
approximately 8 cycles worth of RAS dummy cycles are required. When the on-chip refresh counter is
applied, approximately 8-cycles worth of CAS-before-RAS dummy cycles are required instead of the
RAS dummy cycles.
7)
Measured at t
T
= 5 ns.
When measuring input signal timing, V
IH
(min) and V
IL
(max) are used for reference points. In
addition, rise and fall time are defined between V
IH
and V
IL
.
Measured using an equivalent of 50 pF and one standard TTL load.
8)
9)
10) t
OFF
(max) and t
OEZ
(max) are defined as the time until output voltage can no longer be measured when
output switches to a high impedance condition.
11) Operation is guaranteed if either t
RRH
or t
RCH
are satisfied.
12) These parameters are measured from the falling edge of CAS for an early-write cycle, and from the
falling edge of UW and LW for a read-write/read-modify-write cycle.
13) t
WCS
, t
CWD
, t
RWD
, t
AWD
and t
CPWD
are not restrictive operating parameters for memory in that they
specify the operating mode. If t
WCS
≥
t
WCS
(min), the cycle switches to an early-write cycle and output
pins switch to high impedance throughout the cycle. If t
CWD
≥
t
CWD
(min), t
RWD
≥
t
RWD
(min), t
AWD
≥
t
AWD
(min) and t
CPWD
≥
t
CPWD
(min), the cycle switches to a read-write/read-modify-write cycle and
data outputs equal information in the selected cells. If neither of the above conditions are satisfied,
output pins are in an undefined state.
14) t
RCD
(max) does not indicate a restrictive operating parameter but instead represents the point at which
the access time t
RAC
(max) is guaranteed. If t
RCD
≥
t
RCD
(max), access time is determined according to
t
CAC
.
15) t
RAD
(max) does not indicate a restrictive operating parameter but instead represents the point at which
the access time t
RAC
(max) is guaranteed. If t
RAD
≥
t
RAD
(max), access time is determined according to
t
AA
.
16) Operation is guaranteed if either t
DZC
or t
DZO
are satisfied.
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| LC321664BJ | 1 MEG (65536 words X 16 bits) DRAM Fast Page Mode, Byte Write |
| LC321664BM | 1 MEG (65536 words X 16 bits) DRAM Fast Page Mode, Byte Write |
| LC321664BT-80 | 1 MEG (65536 words X 16 bits) DRAM Fast Page Mode, Byte Write |
| LC321664AJ-80 | |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LC321664AM-80 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| LC321664AT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| LC321664AT-80 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:1 MEG (65536 words X 16 bits) DRAM Fast Page Mode, Byte Write |
| LC321664BJ | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:1 MEG (65536 words X 16 bits) DRAM Fast Page Mode, Byte Write |
| LC321664BJ-70 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述: |
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