參數(shù)資料
型號(hào): LB1876(36SOP)
英文描述: Controller Miscellaneous - Datasheet Reference
中文描述: 控制器雜項(xiàng)-數(shù)據(jù)表參考
文件頁(yè)數(shù): 12/14頁(yè)
文件大?。?/td> 120K
代理商: LB1876(36SOP)
No. 6201-12/14
LB1876
LB1876 Overview
1. Speed control circuit
This IC provides high-precision, low-jitter, and stable motor rotation since it adopts a PLL speed control technique.
This PLL circuit compares the phases of the edges on the CLK signal (falling edges) and the FG signal (falling edges
on the FG
IN
+.FGS output) and controls the speed using that error output.
The FG servo frequency during control operation is the same as the clock frequency.
f
FG
(servo) = fC
LK
2. Output drive circuit
To reduce power loss in the output, this IC adopts a direct PWM drive technique. The output transistors are always
saturated when on, and the motor drive power is controlled by changing the output on duty. Since the lower side
transistor is used for the output PWM switching, Schottky diodes must be inserted between the outputs and V
CC
. (This
is because if the diodes used do not have a short reverse recovery time, instantaneous through currents will flow when
the lower side transistor turns on.)
The diodes between the outputs and ground are built in. However, if problems (such as waveform disruption during
lower side kickback) occur for large output currents, attach external rectifying diodes or Schottky diodes. If reverse
control mode is selected for braking and problems such as incorrect operation or excess heat generation due to the
reverse recovery time of the lower side diode causes a problem, add an external Schottky diode.
3. Current control circuit
The current control circuit controls the current (limits the peak current) to the current determined by I = V
RF
/Rf (V
RF
=
0.5 V typ., Rf: current detection resistor). The limiting operation consists of reducing the output on duty to suppress the
current.
The current control circuit detects the diode reverse recovery current due to the PWM operation, and has an operating
delay (about 3 μs) to prevent incorrect current limiting operation. If the motor coils have a relatively low resistance, or
relatively low inductance, the changes in current flow at startup (the state where the motor presents no back
electromotive force) will be rapid. As a result, the current limiter may operate at currents in excess of the set current
due to this delay. In such cases, the current limit value must be set so as to take the current increase due to the delay
into account.
4. Power saving circuit
This IC goes to the power saving state, which reduces power consumption, in the stopped state. Power is reduced in the
power saving state by cutting the bias current to most of the circuit blocks in the IC. However, the 5 V regulator circuit
does operate and provide its output in the power saving state.
5. Reference clock
The externally input clock signal must be free of chattering and other noise. The input circuit does have hysteresis, but
if problems occur, the clock signal must be input through a capacitor or other noise reduction circuit.
If the IC is set to the start state with no reference clock input, and if the constraint protection circuit is operated, after
the motor rotates a certain amount, the drive will be turned off. However, if the constraint protection circuit is not
operated, and furthermore, if reverse control mode is selected during braking, the motor will run backwards at
increasing speed. A workaround will be required in this case. (This problem occurs because the constraint protection
circuit oscillator signal is used for clock cutoff protection.)
6. PWM frequency
The PWM frequency is determined by the capacitor C (F) connected to the PWM pin.
fPW
1/(15000
×
C)
If an 1800 pF capacitor is used, the frequency will be about 37 kHz. If the PWM frequency is too low, the motor will
emit audible switching noise, and if it is too high, the power loss will increase. A frequency in the range 15 to 50 kHz
is desirable. The capacitor ground must be connected as close as possible to the IC control block ground (the GND1
pin) to minimize the influence of the output on this circuit.
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