參數(shù)資料
型號(hào)： LAN91C100-FD
廠商： STANDARD MICROSYSTEMS CORP
元件分類： 微控制器/微處理器
英文描述： FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY
中文描述： 2 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP208
封裝： QFP-208
文件頁數(shù)： 32/79頁
文件大?。?/td> 585K
代理商： LAN91C100-FD
FEAST Fast Ethernet Controller with Full Duplex Capability
Rev.
10/14/2002
Page 32
SMSC DS – LAN91C100FD Rev. D
PRELIMINARY
Notes:
Bits N2,N1,N0 bits are ignored by the LAN91C100FD but should be used for command 0 to preserve software
compatibility with the LAN91C92 and future devices. They should be zero for all other commands.
When using the RESET TX FIFOS command, the CPU is responsible for releasing the memory associated with
outstanding packets, or re-enqueuing them. Packet numbers in the completion FIFO can be read via the FIFO ports
register before issuing the command.
MMU commands releasing memory (commands 4 and 5) should only be issued if the corresponding packet number
has memory allocated to it.
COMMAND SEQUENCING
A second allocate command (command 1) should not be issued until the present one has completed.
Completion is determined by reading the FAILED bit of the allocation result register or through the
allocation interrupt.
A second release command (commands 4, 5) should not be issued if the previous one is still being
processed. The BUSY bit indicates that a release command is in progress. After issuing command 5, the
contents of the PNR should not be changed until BUSY goes low. After issuing command 4, command 3
should not be issued until BUSY goes low.
BUSY BIT - Readable at bit 0 of the MMU command register address. When set indicates that MMU is still
processing a release command. When clear, MMU has already completed last release command. BUSY
and FAILED bits are set upon the trailing edge of command.
BANK 2
OFFSET
2
NAME
TYPE
SYMBOL
PNR
PACKET NUMBER REGISTER
READ/WRITE
0
0
0
0
PACKET NUMBER AT TX AREA
0
0
0
0
0
0
PACKET NUMBER AT TX AREA - The value written into this register determines which packet number is
accessible through the TX area. Some MMU commands use the number stored in this register as the
packet number parameter. This register is cleared by a RESET or a RESET MMU Command.
OFFSET
3
NAME
TYPE
SYMBOL
ARR
ALLOCATION RESULT REGISTER
READ ONLY
This register is updated upon an ALLOCATE MEMORY MMU command.
FAILED
1
0
0
ALLOCATED PACKET NUMBER
0
0
0
0
0
0
FAILED - A zero indicates a successful allocation completion. If the allocation fails the bit is set and only
cleared when the pending allocation is satisfied. Defaults high upon reset and reset MMU command. For
polling purposes, the ALLOC_INT in the Interrupt Status Register should be used because it is
synchronized to the read operation. Sequence:
1. Allocate Command
2. Poll ALLOC_INT bit until set
3. Read Allocation Result Register
相關(guān)PDF資料
PDF描述
LAN91C100FD FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY
LAN91C100FDREVD FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY
LAN91C100FDREVB FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY
LAN91C100FDTQFP FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY
LAN91C100 FEAST⑩ Fast Ethernet Controller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LAN91C100FD(208PQFP) 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller
LAN91C100FD(208TQFP) 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller
LAN91C100FD_06 制造商:SMSC 制造商全稱:SMSC 功能描述:FEAST Fast Ethernet Controller with Full Duplex Capability
LAN91C100FD_0601 制造商:SMSC 制造商全稱:SMSC 功能描述:FEAST Fast Ethernet Controller with Full Duplex Capability
LAN91C100FDQFP 制造商:Rochester Electronics LLC 功能描述: 制造商:SMSC 功能描述:
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*