參數(shù)資料
型號: LAN9118-MT
廠商: STANDARD MICROSYSTEMS CORP
元件分類: 微控制器/微處理器
英文描述: HIGH PERFORMANCE SINGLE CHIP 10/100NON PCI ETHERNET CONTROLLER
中文描述: 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100
封裝: ROHS COMPLIANT, TQFP-100
文件頁數(shù): 3/6頁
文件大小: 213K
代理商: LAN9118-MT
High-Performance Single-Chip 10/100 Non-PCI Ethernet Controller
SMSC LAN9118
3
Revision 0.5 (09-09-04)
PRODUCT PREVIEW
General Description
The LAN9118 is a full-featured, single-chip 10/100 Ethernet controller designed for embedded
applications where performance, flexibility, ease of integration and low cost are required. The LAN9118
has been specifically architected to provide the highest performance possible for any given
architecture. The LAN9118 is fully IEEE 802.3 10BASE-T and 802.3u 100BASE-TX compliant.
The LAN9118 includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave
interface. The simple, yet highly functional host bus interface provides a glue-less connection to most
common 16 and 32-bit microprocessors and microcontrollers. LAN9118 includes large transmit and
receive data FIFO’s with a high-speed host bus interface to accommodate high bandwidth, high latency
applications. In addition, the LAN9118 memory buffer architecture allows the most efficient use of
memory resources by optimizing packet granularity.
Applications
The LAN9118 is well suited for many high-performance embedded applications, including:
Digital television
Video record/playback systems
Set-top boxes
Printers and scanners
The LAN9118 supports numerous power management and wakeup features. The LAN9118 can be
placed in a reduced power mode and can be programmed to issue an external wake signal via several
methods, including Magic Packet, Wake on LAN and Link Status Change. This signal is ideal for
triggering system power-up using remote Ethernet wakeup events. The device can be removed from
the low power state via a host processor command.
The LAN9118 also supports features which reduce or eliminate packet loss. Its internal 16k SRAM can
hold over 200 received packets. If the receive FIFO gets too full, the LAN9118 can automatically
generate flow control packets to the remote node, or assert back-pressure on the remote node by
generating a network collision. The host controller can also.
The diagram shown in Figure 1, "System Block Diagram utilizing the SMSC LAN9118", describes a
typical system configuration of the LAN9118 in a typical embedded environment.
The LAN9118 is designed to be general purpose Ethernet controller that is platform independent. The
LAN9118 consists of four major functional blocks. The four blocks are:
1. 10/100 Ethernet PHY
2. 10/100 Ethernet MAC
3. RX/TX FIFO’s
4. Slave Interface Module
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