參數(shù)資料
型號： LA4128V-75TN144E
廠商： Lattice Semiconductor Corporation
文件頁數(shù)： 34/42頁
文件大?。?/td> 0K
描述： IC CPLD 128MACROCELLS 144TQFP
標(biāo)準(zhǔn)包裝： 60
系列： LA-ispMACH
可編程類型： 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1)： 7.5ns
電壓電源 - 內(nèi)部： 3 V ~ 3.6 V
宏單元數(shù)： 128
輸入/輸出數(shù)： 96
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 144-LQFP
供應(yīng)商設(shè)備封裝： 144-TQFP（20x20）
包裝： 托盤
Lattice Semiconductor
LA-ispMACH 4000V/Z Automotive Family Data Sheet
4
Figure 3. AND Array
Enhanced Logic Allocator
Within the logic allocator, product terms are allocated to macrocells in product term clusters. Each product term
cluster is associated with a macrocell. The cluster size for the LA-ispMACH 4000V/Z automotive family is 4+1 (total
5) product terms. The software automatically considers the availability and distribution of product term clusters as it
ts the functions within a GLB. The logic allocator is designed to provide three speed paths: 5-PT fast bypass path,
20-PT Speed Locking path and an up to 80-PT path. The availability of these three paths lets designers trade tim-
ing variability for increased performance.
The enhanced Logic Allocator of the LA-ispMACH 4000V/Z automotive family consists of the following blocks:
Product Term Allocator
Cluster Allocator
Wide Steering Logic
Figure 4 shows a macrocell slice of the Logic Allocator. There are 16 such slices in the GLB.
Figure 4. Macrocell Slice
PT0
PT1
Cluster 0
PT2
PT3
PT4
In[0]
In[34]
In[35]
Note:
Indicates programmable fuse.
PT80
PT81
PT82
Shared PT Clock
Shared PT Initialization
Shared PTOE
PT76
PT77
PT78
PT79
PT75
Cluster 15
to
n+1
to
n-1
to
n-2
from
n-1
from
n-4
from
n+2
from
n+1
5-PT
From
n-4
1-80
PTs
To n+4
Fast 5-PT
Path
To XOR (MC)
Cluster
Individual Product
Term Allocator
Cluster
Allocator
SuperWIDE
Steering Logic
n
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LA4128V-75TN44E 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V/1.8V In-System Programmable SuperFAST High Density PLDs
LA4128V-75TN48E 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V/1.8V In-System Programmable SuperFAST High Density PLDs
LA4128ZC-75TN100E 功能描述:CPLD - 復(fù)雜可編程邏輯器件 Auto Grade (AEC-Q100 ) ispMACH4128Z RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
LA4128ZC-75TN128E 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V/1.8V In-System Programmable SuperFAST High Density PLDs
LA4128ZC-75TN144E 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V/1.8V In-System Programmable SuperFAST High Density PLDs
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