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參數(shù)資料
| 型號(hào)： | L9823 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Octal Low-Side Driver for bulb, resistive and inductive loads with serial input control, output protection and diagnostic |
| 中文描述： | 八路低端的燈泡，電阻和串行輸入控制，輸出保護(hù)和診斷感性負(fù)載驅(qū)動(dòng)程序 |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 168K |
| 代理商： | L9823 |
L9823
2/12
PIN FUNCTION
N°
Pin
Description
1
Out 7
Output 7
2
Out 6
Output 6
3
SCLK
SCLK. The system clock pin (SCLK) clocks the internal shift registers of the L9823. The serial
input pin (SI) accepts data into the input shift register on the falling edge of the SCLK signal while
the serial output pin (SO) shifts data information out of the shift register on the rising edge of the
SCLK signal. False clocking of the shift register must be avoided to guarantee validity of data. It
is essential that the SCLK pin be in a logic low state whenever chip select bar pin (CSB) makes
any transition. For this reason, it is recommended though not necessary, that the SCLK pin be
kept in a low logic state as long as the device is not accessed (CSB in logic high state). When
CSB is in a logic high state, any signal at the SCLK and SI pin is ignored and SO is tri-stated
(high-impedance).
4
SI
SI. This pin is for the input of serial instruction data. SI information is read in on the falling edge
of SCLK. A logic high state present on this pin when the SCLK signal rises will program a
specific output OFF, and in turn, turns OFF the specific output on the rising edge of the CSB
signal. Conversely, a logic low state present on the SI pin will program the output ON, and in
turn, turns ON the specific output on the rising edge of the CSB signal. To program the eight
outputs of the L9823 ON or OFF, an eight bit serial stream of data is required to be entered into
the SI pin starting with Output 7, followed by Output 6, Output 5, etc., to Output 0. For each rise
of the SCLK signal, with CSB held in a logic low state, a databit instruction (ON or OFF) is
loaded into the shift register per the databit SI state. The shift register is full after eight bits of
information have been entered. To preserve data integrity, care should be taken to not transition
SI as SCLK transitions from a low-to-high logic state.
5
GND
GND
6
GND
GND
7
GND
GND
8
GND
GND
9
SO
SO. The serial output (SO) pin is the tri-stateable output from the shift register. The SO pin
remains in a high impedance state until the CSB pin goes to a logic low state. The SO data
reports the drain status, either high or low. The SO pin changes state on the rising edge of SCLK
and reads out on the falling edge of SCLK. When an output is OFF and not faulted, the
corresponding SO databit is a high state. When SO an output is ON, and there is no fault, the
corresponding databit on the SO pin will be a low logic state. The SI / SO shifting of data follows
a first-in-first-out protocol with both input and output words transferring the Most Significant Bit
(MSB) first. The SO pin is not affected by the status of the Reset pin.
10
CSB
CSB. The system MCU selects the L9823 to be communicated with through the use of the CSB
pin. Whenever the pin is in a logic low state, data can be transferred from the MCU to the L9823
and vise versa. Clocked-in data from the MCU is transferred from the L9823 shift register and
latched into the power outputs on the rising edge of the CSB signal. On the falling edge of the
CSB signal, drain status information is transferred from the power outputs and loaded into the
device's shift register. The CSB pin also controls the output driver of the serial output pin.
Whenever the CSB pin goes to a logic low state, the SO pin output driver is enabled allowing
information to be transferred from the L9823 to the MCU. To avoid any spurious data, it is
essential that the high-to-low transition of the CSB signal occur only when SCLK is in a logic low
state.
11
Out 5
Output 5
12
Out 4
Output 4
13
Out 3
Output 3
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| L9823013TR | 功能描述:電源開關(guān) IC - 配電 Octal Lowside Driver Bulb, Resistive RoHS:否 制造商:Exar 輸出端數(shù)量:1 開啟電阻（最大值）:85 mOhms 開啟時(shí)間（最大值）:400 us 關(guān)閉時(shí)間（最大值）:20 us 工作電源電壓:3.2 V to 6.5 V 電源電流（最大值）: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOT-23-5 |
| L9824 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| L9824D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| L9825 | 功能描述:電源開關(guān) IC - 配電 Octal Low Side RoHS:否 制造商:Exar 輸出端數(shù)量:1 開啟電阻（最大值）:85 mOhms 開啟時(shí)間（最大值）:400 us 關(guān)閉時(shí)間（最大值）:20 us 工作電源電壓:3.2 V to 6.5 V 電源電流（最大值）: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOT-23-5 |
| L9825_03 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Octal Low-side Driver For Resistive and Inductive Loads With Serial / Parallel Input Control, Output Protection and Diagnostic |
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