參數(shù)資料
型號(hào)： L6732TR
廠商： 意法半導(dǎo)體
英文描述： Adjustable step-down controller with synchronous rectification
中文描述： 可調(diào)式降壓同步整流控制器
文件頁(yè)數(shù)： 8/33頁(yè)
文件大小： 735K
代理商： L6732TR
Pin connections and functions
L6732
8/33
7
EAREF
By setting the voltage at this pin is possible to select the internal/external reference
and the switching frequency:
V
EAREF
0-80% of V
CCDR
-> External Reference/F
SW
=250KHz
V
EAREF
= 80%-95% of V
CCDR
-> V
REF
= 0.6V/F
SW
=500KHz
V
EAREF
= 95%-100% of V
CCDR ->
V
REF
= 0.6V/F
SW
=250KHz
An internal clamp limits the maximum V
EAREF
at 2.5V (typ.). The device captures the
analog value present at this pin at the start-up when V
CC
meets the UVLO threshold.
8
OCL
A resistor connected from this pin to ground sets the valley- current-limit. The valley
current is sensed through the low-side MOSFET(s). The internal current generator
sources a current of 100μA (I
OCL
) from this pin to ground through the external resistor
(R
OCL
). The over-current threshold is given by the following equation:
Connecting a capacitor from this pin to GND helps in reducing the noise injected from
V
CC
to the device, but can be a low impedance path for the high-frequency noise
related to the GND. Connect a capacitor only to a "clean" GND.
9
OCH
A resistor connected from this pin and the high-side MOSFET(s) drain sets the peak-
current-limit. The peak current is sensed through the high-side MOSFET(s). The
internal 100μA current generator (I
OCH
) sinks a current from the drain through the
external resistor (R
OCH
). The over-current threshold is given by the following equation:
10
PHASE
This pin is connected to the source of the high-side MOSFET(s) and provides the
return path for the high-side driver. This pin monitors the drop across both the upper
and lower MOSFET(s) for the current limit together with OCH and OCL.
11
HGATE
This pin is connected to the high-side MOSFET(s) gate.
12
BOOT
Through this pin is supplied the high-side driver. Connect a capacitor from this pin to
the PHASE pin and a diode from V
CCDR
to this pin (cathode versus BOOT).
13
PGND
This pin has to be connected closely to the low-side MOSFET(s) source in order to
reduce the noise injection into the device.
14
LGATE
This pin is connected to the low-side MOSFET(s) gate.
15
V
CCDR
5V internally regulated voltage. It is used to supply the internal drivers. Filter it to
ground with at least 1μF ceramic cap.
16
V
CC
Supply voltage pin. The operative supply voltage range is from 4.5V to 14V.
Table 3.
Pin functions
I
VALLEY
I
2
OCL
R
DSONLS
--------------------I
=
I
PEAK
I
R
DSONHS
OCH
-------------------R
=
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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