參數(shù)資料
型號(hào): L6731BTR
廠(chǎng)商: 意法半導(dǎo)體
英文描述: Transistor; Type: Amplifiers/Bipolar; VCEO (V): -25; Ic (A): -1; Pc (W): 0.8; hFE: 85 to 330; VCE (sat) (V) max: -0.5; Package: TO-92Mod
中文描述: 可調(diào)式降壓同步整流專(zhuān)用的DDR控制器內(nèi)存
文件頁(yè)數(shù): 19/24頁(yè)
文件大小: 311K
代理商: L6731BTR
L6731B
Application details
19/24
6.3
Input capacitors
The input capacitors have to sustain the RMS current flowing through them, that is:
Where D is the duty cycle. The equation reaches its maximum value, I
OUT
/2 with D = 0.5. The
losses in worst case are:
6.4
Compensation network
The loop is based on a voltage mode control (
Figure 18.
). The output voltage is regulated to the
internal/external reference voltage and scaled by the external resistor divider. The error
amplifier output V
COMP
is then compared with the oscillator triangular wave to provide a pulse-
width modulated (PWM) with an amplitude of V
IN
at the PHASE node. This waveform is filtered
by the output filter. The modulator transfer function is the small signal transfer function of V
OUT
/
V
COMP
. This function has a double pole at frequency F
LC
depending on the L-C
OUT
resonance
and a zero at FESR depending on the output capacitor's ESR. The DC Gain of the modulator is
simply the input voltage V
IN
divided by the peak-to-peak oscillator voltage: V
OSC
.
Figure 11. Compensation Network
)
1
D
D
Iout
Irms
=
2
)
5
Iout
ESR
P
=
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