參數(shù)資料
型號： L652DU90RI
廠商： Advanced Micro Devices, Inc.
英文描述： 128 Megabit (16 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIO⑩ Control
中文描述： 128兆位（16米× 8位）的CMOS 3.0伏特，只有統(tǒng)一部門閃存與VersatileIO⑩控制記憶
文件頁數(shù)： 5/54頁
文件大?。?/td> 492K
代理商： L652DU90RI
May 5, 2006 24961A5
Am29LV652D
3
D A T A S H E E T
TABLE OF CONTENTS
General Description . . . . . . . . . . . . . . . . . . . . . . . . 2
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Connection Diagram . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 9
Table 1. Am29LV652D Device Bus Operations ................................9
VersatileIO
(V
IO
) Control .......................................................9
Requirements for Reading Array Data .....................................9
Writing Commands/Command Sequences ............................10
Accelerated Program Operation ..........................................10
Autoselect Functions ...........................................................10
Standby Mode ........................................................................10
Automatic Sleep Mode ...........................................................10
RESET#: Hardware Reset Pin ...............................................10
Output Disable Mode ..............................................................11
Table 2. Sector Address Table for CE# ..........................................11
Table 3. Sector Address Table for CE2# ........................................15
Autoselect Mode .....................................................................19
Table 4. Am29LV652D Autoselect Codes, (HighVoltageMethod) 19
Sector Group Protection and Unprotection .............................20
Table 5. Sector Group Protection/Unprotection AddressTable .....20
Temporary Sector Group Unprotect .......................................21
Figure 1. Temporary Sector Group UnprotectOperation................ 21
Figure 2. In-System Sector Group Protect/UnprotectAlgorithms... 22
Hardware Data Protection ......................................................23
Low VCC Write Inhibit .........................................................23
Write Pulse “Glitch” Protection ............................................23
Logical Inhibit ......................................................................23
Power-Up Write Inhibit .........................................................23
Common Flash Memory Interface (CFI). . . . . . . 23
Table 6. CFI Query Identification String.......................................... 23
System Interface String................................................................... 24
Table 8. Device Geometry Definition.............................................. 24
Table 9. Primary Vendor-Specific Extended Query........................ 25
Command Definitions . . . . . . . . . . . . . . . . . . . . . 25
Reading Array Data ................................................................25
Reset Command .....................................................................26
Autoselect Command Sequence ............................................26
Byte Program Command Sequence .......................................26
Unlock Bypass Command Sequence ..................................26
Figure 3. Program Operation.......................................................... 27
Chip Erase Command Sequence ...........................................27
Sector Erase Command Sequence ........................................28
Erase Suspend/Erase Resume Commands ...........................28
Figure 4. Erase Operation............................................................... 29
Table 10. Am29LV652D Command Definitions ..............................30
Write Operation Status . . . . . . . . . . . . . . . . . . . . . 31
DQ7: Data# Polling .................................................................31
Figure 5. Data# Polling Algorithm.................................................. 31
RY/BY#: Ready/Busy# ............................................................32
DQ6: Toggle Bit I ....................................................................32
Figure 6. Toggle Bit Algorithm........................................................ 32
DQ2: Toggle Bit II ...................................................................33
Reading Toggle Bits DQ6/DQ2 ...............................................33
DQ5: Exceeded Timing Limits ................................................33
DQ3: Sector Erase Timer .......................................................33
Table 11. Write Operation Status ...................................................34
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 35
Figure 7. Maximum Negative OvershootWaveform..................... 35
Figure 8. Maximum Positive OvershootWaveform....................... 35
DC Characteristics
(for two Am29LV065 devices) . . . . . . . . . . . . . . . 36
Figure 9. I
CC1
Current vs. Time (Showing Active and
AutomaticSleepCurrents)............................................................. 37
Figure 10. Typical I
CC1
vs. Frequency............................................ 37
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 11. Test Setup.................................................................... 38
Table 12. Test Specifications .........................................................38
Figure 12. Input Waveforms and MeasurementLevels................. 38
Key to Switching Waveforms. . . . . . . . . . . . . . . . 38
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 39
Read-Only Operations ...........................................................39
Figure 13. Read Operation Timings............................................... 39
Hardware Reset (RESET#) ....................................................40
Figure 14. Reset Timings............................................................... 40
Erase and Program Operations ..............................................41
Figure 15. Program Operation Timings.......................................... 42
Figure 16. Accelerated Program Timing Diagram.......................... 42
Figure 17. Chip/Sector Erase Operation Timings.......................... 43
Figure 18. Data# Polling Timings (DuringEmbeddedAlgorithms). 44
Figure 19. Toggle Bit Timings (DuringEmbeddedAlgorithms)...... 45
Figure 20. DQ2 vs. DQ6................................................................. 45
Temporary Sector Unprotect ..................................................46
Figure 21. Temporary Sector Group UnprotectTimingDiagram... 46
Figure 22. Sector Group Protect and UnprotectTimingDiagram.. 47
Figure 23. Alternate CE# Controlled Write
(Erase/Program)OperationTimings.............................................. 49
Erase And Programming Performance . . . . . . . 50
Latchup Characteristics. . . . . . . . . . . . . . . . . . . . 50
Input/Output Capacitance . . . . . . . . . . . . . . . . . . 50
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 51
FSA063—63-Ball Fine-Pitch Ball Grid Array (FBGA) 11 x 12 mm
package ..................................................................................51
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 52
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