參數(shù)資料
型號(hào): L5953
廠商: 意法半導(dǎo)體
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: MULTIPLE SWITCHING VOLTAGE REGULATOR
中文描述: 多重開關(guān)穩(wěn)壓
文件頁數(shù): 21/24頁
文件大?。?/td> 217K
代理商: L5953
21/24
L5953
and a resistive contribute given by the ESR of the capacitor and which is equal to
VC fixes the value for C7 while
VESR limits the ESR of the capacitor.Usually the capacitor is chosen so that
the total ripple on the output regulated voltage Vo is equal to 1% of the value of Vo. If V
ripple
is the maximum
allowed voltage ripple on Vo then it should result:
More often the minimum value of C7 is imposed by other considerations such as to get a good dynamic behav-
iour of the output voltage in case of large load variations.
Free-wheeling diode
The diode must withstand an average current Id equal to Id = I
lim
( 1- D
min
)
where I
lim
is the current of intervention of the short circuit protection and D
min
is the minimum duty cycle. As D
min
is vey low, the current Id can be assumed equal to I
lim
.
Compensation Network
In continuous mode, the voltage controlled buck converter showes two poles due to the output LC filter and one
zero due to the ESR of the output capacitor. The suggested compensation network introduces two zeros and
two poles:
– the zeros compensate the double poles of the LC filter
– one pole compensates the zero due to ESR of the output capacitor
– the second pole is nominally located in the origin which means an infinite gain at frequency null. In
the reality the DC value of the closed loop gain can not be greater than the DC value of the EA open
loop gain and the pole is located at very low frequency.
The values for the components of the compensation network can be fixed when the inductor L1 and the output
capacitor C7 are chosen.
The necessary steps are following:
1.fix the cross-over frequency f
C
of the overall loop gain.
Usually
f
c
0.1 f
sw,min
=
where f
sw,min
is the minimum switching frequency
2.Calculate the high frequency error amplifier gain
3.Chose R3 and calculate
The value for R3 has not to be very high (for example 10K
) so to limit the error due to an error amplifier input
offset current.
V
c
I
8 C7 f
sw min
--------------------------------------
=
V
ESR
ESR
I
L max
=
V
ripple
V
c
2
V
ESR
2
+
G
c
0.25 f
c
2
π
ESR
------------
=
C8
2
R3
-----------------------
=
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