參數(shù)資料
型號： L320ML90NF
廠商： Advanced Micro Devices, Inc.
英文描述： 32 Megabit (2 M x 16-Bit/4 M x 8-Bit) MirrorBit⑩ 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O⑩ Control
中文描述： 32兆位（2米× 16位/ 4米× 8位）的MirrorBit⑩3.0伏特，只有統(tǒng)一閃存部門與VersatileI /輸出⑩控制
文件頁數(shù)： 6/59頁
文件大?。?/td> 657K
代理商： L320ML90NF
4
Am29LV320MH/L
26517B4 January31,2007
D A T A S H E E T
TABLE OF CONTENTS
Product Selector Guide. . . . . . . . . . . . . . . . . . . . . 5
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 6
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Ordering Information. . . . . . . . . . . . . . . . . . . . . . . 9
Device Bus Operations . . . . . . . . . . . . . . . . . . . . 10
Table 1. Device Bus Operations..................................................... 10
VersatileIO
(V
IO
) Control .....................................................10
Requirements for Reading Array Data ...................................11
Page Mode Read ............................................................................11
Writing Commands/Command Sequences ............................11
Write Buffer .....................................................................................11
Accelerated Program Operation ......................................................11
Autoselect Functions .......................................................................11
Automatic Sleep Mode ...........................................................12
RESET#: Hardware Reset Pin ...............................................12
Output Disable Mode ..............................................................12
Table 2. Sector Address Table........................................................ 13
Table 3. Autoselect Codes, (High Voltage Method) ....................... 15
Sector Group Protection and Unprotection .............................16
Table 4. Sector Group Protection/Unprotection AddressTable ..... 16
Temporary Sector Group Unprotect .......................................17
Figure 1. Temporary Sector Group UnprotectOperation ................17
Figure 2. In-System Sector Group Protect/UnprotectAlgorithms ...18
Secured Silicon Sector Flash MemoryRegion .......................19
Table 5. Secured Silicon Sector Contents...................................... 19
Figure 3. Secured Silicon Sector Protect Verify ..............................20
Hardware Data Protection ......................................................20
Low VCC Write Inhibit .....................................................................20
Write Pulse “Glitch” Protection ........................................................20
Logical Inhibit ..................................................................................20
Power-Up Write Inhibit ....................................................................20
Common Flash Memory Interface (CFI). . . . . . . 20
Table 6. CFI Query Identification String ..........................................21
Table 7. System Interface String..................................................... 21
Table 8. Device Geometry Definition ..............................................22
Table 9. Primary Vendor-Specific Extended Query ........................23
Command Definitions . . . . . . . . . . . . . . . . . . . . . 24
Reading Array Data ................................................................24
Reset Command .....................................................................24
Autoselect Command Sequence ............................................24
Enter Secured Silicon Sector/Exit Secured Silicon Sector
CommandSequence ..............................................................25
Word/Byte Program Command Sequence .............................25
Unlock Bypass Command Sequence ..............................................25
Write Buffer Programming ...............................................................25
Accelerated Program ......................................................................26
Figure 4. Write Buffer Programming Operation ...............................27
Figure 5. Program Operation ..........................................................28
Program Suspend/Program Resume Command Sequence ...28
Figure 6. Program Suspend/Program Resume ...............................29
Chip Erase Command Sequence ...........................................29
Sector Erase Command Sequence ........................................29
Erase Suspend/Erase Resume Commands ...........................30
Figure 7. Erase Operation ..............................................................30
Table 10. Command Definitions (x16 Mode, BYTE# = V
IH
)........... 31
Table 11. Command Definitions (x8 Mode, BYTE# = V
).............. 32
Write Operation Status. . . . . . . . . . . . . . . . . . . . . 33
DQ7: Data# Polling .................................................................33
Figure 8. Data# Polling Algorithm ..................................................33
DQ6: Toggle Bit I ....................................................................34
Figure 9. Toggle Bit Algorithm ........................................................35
DQ2: Toggle Bit II ...................................................................35
Reading Toggle Bits DQ6/DQ2 ...............................................35
DQ5: Exceeded Timing Limits ................................................36
DQ3: Sector Erase Timer .......................................................36
DQ1: Write-to-Buffer Abort .....................................................36
Table 12. Write Operation Status................................................... 36
Figure 10. Maximum Negative OvershootWaveform ...................37
Figure 11. Maximum Positive OvershootWaveform .....................37
Operating Ranges. . . . . . . . . . . . . . . . . . . . . . . . . 37
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 38
Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 12. Test Setup ....................................................................39
Table 13. Test Specifications......................................................... 39
Key to Switching Waveforms. . . . . . . . . . . . . . . . 39
Figure 13. Input Waveforms and
Measurement Levels ......................................................................39
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 40
Read-Only Operations ...........................................................40
Figure 14. Read Operation Timing .................................................40
Figure 15. Page Read Timings ......................................................41
Hardware Reset (RESET#) ....................................................42
Figure 16. Reset Timings ...............................................................42
Erase and Program Operations ..............................................43
Figure 17. Program Operation Timings ..........................................44
Figure 18. Accelerated Program Timing Diagram ..........................44
Figure 19. Chip/Sector Erase Operation Timings ..........................45
Figure 20. Data# Polling Timings (During Embedded Algorithms) .46
Figure 21. Toggle Bit Timings (During Embedded Algorithms) ......47
Figure 22. DQ2 vs. DQ6 .................................................................47
Temporary Sector Unprotect ..................................................48
Figure 23. Temporary Sector Group Unprotect TimingDiagram ...48
Figure 24. Sector Group Protect and Unprotect TimingDiagram ..49
Alternate CE# Controlled Erase and ProgramOperations .....50
Figure 25. Alternate CE# Controlled Write (Erase/Program)
OperationTimings ..........................................................................51
Erase And Programming Performance. . . . . . . . 52
Latchup Characteristics. . . . . . . . . . . . . . . . . . . . 52
TSOP Pin and BGA Package Capacitance . . . . . 53
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 54
TS056/TSR056—56-Pin Standard and Reverse Pinout Thin
Small Outline Package (TSOP) ..............................................54
LAA064—64-Ball Fortified Ball Grid Array (
F
BGA) 13 x 11 mm
Package ..................................................................................55
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 56
相關(guān)PDF資料
PDF描述
L320ML90NI 32 Megabit (2 M x 16-Bit/4 M x 8-Bit) MirrorBit⑩ 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O⑩ Control
L4401DW1T1 Silicon PNP Epitaxial Planer Transistor
L4501DW1T1 Silicon NPN Epitaxial Planer Transistor
L4501DW1T1G Silicon NPN Epitaxial Planer Transistor
L4601DW1T1 Silicon NPN Epitaxial Planer Transistor(Tr1), Silicon PNP Epitaxial Planer Transistor(Tr2)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
L320ML90NI 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:32 Megabit (2 M x 16-Bit/4 M x 8-Bit) MirrorBit⑩ 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O⑩ Control
L-320X 制造商:COOPER INDUSTRIES 功能描述:BIT 1/4 HEX DRV POWER # .036
L321 制造商:Burndy 功能描述:L-DIE
L3211 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC
L3212 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*